After adding vec_cmp expanders we have seen various performance
related regression in the testsuite. These appear to be caused by a
missing vcond_mask definition in the backend. Fixed with this patch.
The patch fixes the following testsuite fails:
FAIL: gcc.dg/vect/vect-21.c -flto -ffat-lto-objects scan-tree-dump-times vect
"vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-21.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-23.c -flto -ffat-lto-objects scan-tree-dump-times vect
"vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-23.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-24.c -flto -ffat-lto-objects scan-tree-dump-times vect
"vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-24.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-live-6.c -flto -ffat-lto-objects scan-tree-dump vect
"vectorized 1 loops"
FAIL: gcc.dg/vect/vect-live-6.c scan-tree-dump vect "vectorized 1 loops"
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrab\\t%v.?,%v.?,7 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesraf\\t%v.?,%v.?,31 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrah\\t%v.?,%v.?,15 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrlb\\t%v.?,%v.?,7 4
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrlf\\t%v.?,%v.?,31 4
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrlh\\t%v.?,%v.?,15 4
FAIL: gcc.dg/vect/vect-21.c -flto -ffat-lto-objects scan-tree-dump-times vect
"vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-21.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-23.c -flto -ffat-lto-objects scan-tree-dump-times vect
"vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-23.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-24.c -flto -ffat-lto-objects scan-tree-dump-times vect
"vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-24.c scan-tree-dump-times vect "vectorized 3 loops" 1
FAIL: gcc.dg/vect/vect-live-6.c -flto -ffat-lto-objects scan-tree-dump vect
"vectorized 1 loops"
FAIL: gcc.dg/vect/vect-live-6.c scan-tree-dump vect "vectorized 1 loops"
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrab\\t%v.?,%v.?,7 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesraf\\t%v.?,%v.?,31 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrah\\t%v.?,%v.?,15 6
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrlb\\t%v.?,%v.?,7 4
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrlf\\t%v.?,%v.?,31 4
FAIL: gcc.target/s390/vector/vcond-shift.c scan-assembler-times
vesrlh\\t%v.?,%v.?,15 4
Bootstrapped and regression tested on s390x.
gcc/ChangeLog:
* config/s390/vector.md ("vcond_mask_<mode><mode>"): New expander.
---
gcc/config/s390/vector.md | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 3c01cd1b1e1..3e621daf7b1 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -658,6 +658,17 @@ (define_expand "vcondu<V_HW:mode><V_HW2:mode>"
DONE;
})
+(define_expand "vcond_mask_<mode><mode>"
+ [(set (match_operand:V 0 "register_operand" "")
+ (if_then_else:V
+ (eq (match_operand:<tointvec> 3 "register_operand" "")
+ (match_dup 4))
+ (match_operand:V 2 "register_operand" "")
+ (match_operand:V 1 "register_operand" "")))]
+ "TARGET_VX"
+ "operands[4] = CONST0_RTX (<tointvec>mode);")
+
+
; We only have HW support for byte vectors. The middle-end is
; supposed to lower the mode if required.
(define_insn "vec_permv16qi"
--
2.25.1
