On Mon, 2020-09-21 at 16:56 -0700, Carl Love wrote:
> Segher, Will:
>
> Add support for converting to/from 128-bit integers and 128-bit
> decimal floating point formats.
A more wordy blurb here clarifying what the patch does would be useful.
i.e. this adds support for dcffixqq and dctfixqq instructons..
>
> The updates from the previous version of the patch:
>
> Removed stray ";; carll" comment.
>
> Removed #if 1 and #endif in the test case.
>
> Replaced TARGET_TI_VECTOR_OPS with POWER10.
>
> The patch has been tested on
>
> powerpc64le-unknown-linux-gnu (Power 9 LE)
>
> with no regression errors.
>
> The P10 test was run by hand on Mambo.
>
>
> Carl Love
>
>
> -------------------------------------------------------------------
>
> gcc/ChangeLog
>
> 2020-09-21 Carl Love <c...@us.ibm.com>
> * config/rs6000/dfp.md (floattitd2, fixtdti2): New define_insns.
>
ok.
Need changelog blurb to reflect the rs6000-call changes.
(this may have leaked in from previous or subsequent patch?)
> gcc/testsuite/ChangeLog
>
> 2020-09-21 Carl Love <c...@us.ibm.com>
> * gcc.target/powerpc/int_128bit-runnable.c: Update test.
ok.
> ---
> gcc/config/rs6000/dfp.md | 14 +++++
> gcc/config/rs6000/rs6000-call.c | 4 ++
> .../gcc.target/powerpc/int_128bit-runnable.c | 62 +++++++++++++++++++
> 3 files changed, 80 insertions(+)
>
> diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
> index 8f822732bac..0e82e315fee 100644
> --- a/gcc/config/rs6000/dfp.md
> +++ b/gcc/config/rs6000/dfp.md
> @@ -222,6 +222,13 @@
> "dcffixq %0,%1"
> [(set_attr "type" "dfp")])
>
> +(define_insn "floattitd2"
> + [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
> + (float:TD (match_operand:TI 1 "gpc_reg_operand" "v")))]
> + "TARGET_POWER10"
> + "dcffixqq %0,%1"
> + [(set_attr "type" "dfp")])
> +
> ;; Convert a decimal64/128 to a decimal64/128 whose value is an integer.
> ;; This is the first stage of converting it to an integer type.
>
> @@ -241,6 +248,13 @@
> "TARGET_DFP"
> "dctfix<q> %0,%1"
> [(set_attr "type" "dfp")])
> +
> +(define_insn "fixtdti2"
> + [(set (match_operand:TI 0 "gpc_reg_operand" "=v")
> + (fix:TI (match_operand:TD 1 "gpc_reg_operand" "d")))]
> + "TARGET_POWER10"
> + "dctfixqq %0,%1"
> + [(set_attr "type" "dfp")])
>
> ;; Decimal builtin support
>
> diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
> index e1d9c2e8729..9c50cd3c5a7 100644
> --- a/gcc/config/rs6000/rs6000-call.c
> +++ b/gcc/config/rs6000/rs6000-call.c
> @@ -4967,6 +4967,8 @@ const struct altivec_builtin_types
> altivec_overloaded_builtins[] = {
> RS6000_BTI_bool_V2DI, 0 },
> { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P,
> RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
> + { P9V_BUILTIN_VEC_VCMPNE_P, P10V_BUILTIN_VCMPNET_P,
> + RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0
> },
>
> { P9V_BUILTIN_VEC_VCMPNE_P, P9V_BUILTIN_VCMPNEFP_P,
> RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
> @@ -5074,6 +5076,8 @@ const struct altivec_builtin_types
> altivec_overloaded_builtins[] = {
> RS6000_BTI_bool_V2DI, 0 },
> { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P,
> RS6000_BTI_INTSI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
> + { P9V_BUILTIN_VEC_VCMPAE_P, P10V_BUILTIN_VCMPAET_P,
> + RS6000_BTI_INTSI, RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0
> },
> { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEFP_P,
> RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
> { P9V_BUILTIN_VEC_VCMPAE_P, P9V_BUILTIN_VCMPAEDP_P,
> diff --git a/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c
> b/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c
> index 85ad544e22b..ec3dcf3dff1 100644
> --- a/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c
> +++ b/gcc/testsuite/gcc.target/powerpc/int_128bit-runnable.c
> @@ -38,6 +38,7 @@
> #if DEBUG
> #include <stdio.h>
> #include <stdlib.h>
> +#include <math.h>
>
>
> void print_i128(__int128_t val)
> @@ -59,6 +60,13 @@ int main ()
> __int128_t arg1, result;
> __uint128_t uarg2;
>
> + _Decimal128 arg1_dfp128, result_dfp128, expected_result_dfp128;
> +
> + struct conv_t {
> + __uint128_t u128;
> + _Decimal128 d128;
> + } conv, conv2;
> +
> vector signed long long int vec_arg1_di, vec_arg2_di;
> vector unsigned long long int vec_uarg1_di, vec_uarg2_di, vec_uarg3_di;
> vector unsigned long long int vec_uresult_di;
> @@ -2249,6 +2257,60 @@ int main ()
> abort();
> #endif
> }
> +
> + /* DFP to __int128 and __int128 to DFP conversions */
> + /* Can't get printing of DFP values to work. Print the DFP value as an
> + unsigned int so we can see the bit patterns. */
> + conv.u128 = 0x2208000000000000ULL;
> + conv.u128 = (conv.u128 << 64) | 0x4ULL; //DFP bit pattern for integer 4
> + expected_result_dfp128 = conv.d128;
>
> + arg1 = 4;
> +
> + conv.d128 = (_Decimal128) arg1;
> +
> + result_dfp128 = (_Decimal128) arg1;
> + if (((conv.u128 >>64) != 0x2208000000000000ULL) &&
> + ((conv.u128 & 0xFFFFFFFFFFFFFFFF) != 0x4ULL)) {
> +#if DEBUG
> + printf("ERROR: convert int128 value ");
> + print_i128 (arg1);
> + conv.d128 = result_dfp128;
> + printf("\nto DFP value 0x%llx %llx (printed as hex bit string) ",
> + (unsigned long long)((conv.u128) >>64),
> + (unsigned long long)((conv.u128) & 0xFFFFFFFFFFFFFFFF));
> +
> + conv.d128 = expected_result_dfp128;
> + printf("\ndoes not match expected_result = 0x%llx %llx\n\n",
> + (unsigned long long) (conv.u128>>64),
> + (unsigned long long) (conv.u128 & 0xFFFFFFFFFFFFFFFF));
> +#else
> + abort();
> +#endif
> + }
> +
> + expected_result = 4;
> +
> + conv.u128 = 0x2208000000000000ULL;
> + conv.u128 = (conv.u128 << 64) | 0x4ULL; // 4 as DFP
> + arg1_dfp128 = conv.d128;
> +
> + result = (__int128_t) arg1_dfp128;
> +
> + if (result != expected_result) {
> +#if DEBUG
> + printf("ERROR: convert DFP value ");
> + printf("0x%llx %llx (printed as hex bit string) ",
> + (unsigned long long)(conv.u128>>64),
> + (unsigned long long)(conv.u128 & 0xFFFFFFFFFFFFFFFF));
> + printf("to __int128 value = ");
> + print_i128 (result);
> + printf("\ndoes not match expected_result = ");
> + print_i128 (expected_result);
> + printf("\n");
> +#else
> + abort();
> +#endif
> + }
> return 0;
> }
