On Tue, Sep 15, 2020 at 6:18 PM Segher Boessenkool <seg...@kernel.crashing.org> wrote: > > On Tue, Sep 15, 2020 at 08:51:09AM +0200, Richard Biener wrote: > > On Tue, Sep 15, 2020 at 5:56 AM luoxhu <luo...@linux.ibm.com> wrote: > > > > u[n % 4] = i; > > > > > > > > I guess. Is the % 4 mandated by the vec_insert semantics btw? > > (As an aside -- please use "& 3" instead: that works fine if n is signed > as well, but modulo doesn't. Maybe that is in the patch already, I > didn't check, sorry.) > > > note this is why I asked about the actual CPU instruction - as I read > > Seghers mail > > the instruction modifies a vector register, not memory. > > But note that the builtin is not the same as the machine instruction -- > here there shouldn't be a difference if compiling for a new enough ISA, > but the builtin is available on anything with at least AltiVec.
Well, given we're trying to improve instruction selection that very much should depend on the ISA. Thus if the target says it cannot vec_set to a register in a variable position then we don't want to pretend it can. Richard. > > Segher
