On Sun, 2020-07-19 at 10:42 +0100, Roger Sayle wrote:
> The combination of several my recent nvptx patches has revealed an
> interesting RTL optimization opportunity. This patch to simplify-rtx.c
> simplifies (sign_extend:HI (truncate:QI (?shiftrt:HI x 8))) to just
> (ashiftrt:HI x 8), as the inner shift already sets the high bits
> appropriately. The equivalent zero_extend variant appears to already
> be implemented in simplify_unary_operation_1.
>
> During the compilation of one of the tests in the test suite, we
> manage the generate the redundant sequence of instructions:
>
> (insn 17 16 18 3 (set (reg:HI 35)
> (ashiftrt:HI (reg:HI 34 [ arg ])
> (const_int 8 [0x8]))) "v2si-cvt.c":14:8 94 {ashrhi3}
> (expr_list:REG_DEAD (reg:HI 34 [ arg ])
> (nil)))
> (insn 18 17 19 3 (set (reg:QI 36)
> (truncate:QI (reg:HI 35))) "v2si-cvt.c":14:8 28 {trunchiqi2}
> (expr_list:REG_DEAD (reg:HI 35)
> (nil)))
> (insn 19 18 20 3 (set (reg:HI 37)
> (sign_extend:HI (reg:QI 36))) "v2si-cvt.c":14:6 22 {extendqihi2}
> (expr_list:REG_DEAD (reg:QI 36)
> (nil)))
I can't recall the target, but I've seen similar sequences as well. Thanks for
digging into it.
Jeff
