Andrea Corallo <andrea.cora...@arm.com> writes: > Hi all, > > I'd like to submit the following patch that adds a missing CC reg > clobber for the FJCVTZS instruction [1]. > > The patch adds an executing testcase that fails without the clobber. > > Bootstrapped on aarch64-linux-gnu, regression ongoing. > > Okay for trunk when finished testing? > > Andrea > > [1] > https://developer.arm.com/docs/ddi0596/latest/simd-and-floating-point-instructions-alphabetic-order/fjcvtzs-floating-point-javascript-convert-to-signed-fixed-point-rounding-toward-zero > > gcc/ChangeLog > > 2020-07-30 Andrea Corallo <andrea.cora...@arm.com> > > * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing > clobber. > > gcc/testsuite/ChangeLog > > 2020-07-30 Andrea Corallo <andrea.cora...@arm.com> > > * gcc.target/aarch64/acle/jcvt_2.c: New testcase. > * lib/target-supports.exp > (check_effective_target_aarch64_fjcvtzs_hw): Add new check for > FJCVTZS hw.
OK, thanks. Also OK for any branches that need it. As a follow-up, it might be nice at some point to have a pattern that takes advantage of the Z flag result, but that's obviously much less important than fixing the bug. Richard
