On Tue, Jul 21, 2020 at 6:13 PM Uros Bizjak <ubiz...@gmail.com> wrote:
>
> On Tue, Jul 21, 2020 at 5:46 PM Franz Sirl
> <franz.sirl-ker...@lauterbach.com> wrote:
> > I didn't bisect it, but I see a profiledbootstrap ICE that may be related:
>
> Ah, mfence_sse2 can be expanded from the __builtin_ia32_mfence
> independently of tuning flags. I'm testing the following patch:
Bootstrapped, regression tested on x86_64-linux-gnu {,-m32} for all
default languages + go, and committed with the following ChangeLog:
i386: Fix insn conditions of mfence patterns [PR95750]
2020-07-21 Uroš Bizjak <ubiz...@gmail.com>
gcc/ChangeLog:
PR target/95750
* config/i386/sync.md (mfence_sse2): Enable for
TARGET_64BIT and TARGET_SSE2.
(mfence_nosse): Always enable.
Uros.
> --cut here--
> diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
> index c6827037abf..c88750d3664 100644
> --- a/gcc/config/i386/sync.md
> +++ b/gcc/config/i386/sync.md
> @@ -89,8 +89,7 @@
> (define_insn "mfence_sse2"
> [(set (match_operand:BLK 0)
> (unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))]
> - "(TARGET_64BIT || TARGET_SSE2)
> - && !TARGET_AVOID_MFENCE"
> + "TARGET_64BIT || TARGET_SSE2"
> "mfence"
> [(set_attr "type" "sse")
> (set_attr "length_address" "0")
> @@ -101,8 +100,7 @@
> [(set (match_operand:BLK 0)
> (unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))
> (clobber (reg:CC FLAGS_REG))]
> - "!(TARGET_64BIT || TARGET_SSE2)
> - || TARGET_AVOID_MFENCE"
> + ""
> {
> rtx mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
>
> --cut here--
>
> Uros.
