On Mon, 29 Jun 2020 at 10:56, Andre Vieira (lists) <andre.simoesdiasvie...@arm.com> wrote: > > > On 23/06/2020 21:52, Christophe Lyon wrote: > > On Tue, 23 Jun 2020 at 15:28, Andre Vieira (lists) > > <andre.simoesdiasvie...@arm.com> wrote: > >> On 23/06/2020 13:10, Kyrylo Tkachov wrote: > >>>> -----Original Message----- > >>>> From: Andre Vieira (lists) <andre.simoesdiasvie...@arm.com> > >>>> Sent: 22 June 2020 09:52 > >>>> To: gcc-patches@gcc.gnu.org > >>>> Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com> > >>>> Subject: [PATCH][GCC][Arm] PR target/95646: Do not clobber callee saved > >>>> registers with CMSE > >>>> > >>>> Hi, > >>>> > >>>> As reported in bugzilla when the -mcmse option is used while compiling > >>>> for size (-Os) with a thumb-1 target the generated code will clear the > >>>> registers r7-r10. These however are callee saved and should be preserved > >>>> accross ABI boundaries. The reason this happens is because these > >>>> registers are made "fixed" when optimising for size with Thumb-1 in a > >>>> way to make sure they are not used, as pushing and popping hi-registers > >>>> requires extra moves to and from LO_REGS. > >>>> > >>>> To fix this, this patch uses 'callee_saved_reg_p', which accounts for > >>>> this optimisation, instead of 'call_used_or_fixed_reg_p'. Be aware of > >>>> 'callee_saved_reg_p''s definition, as it does still take call used > >>>> registers into account, which aren't callee_saved in my opinion, so it > >>>> is a rather misnoemer, works in our advantage here though as it does > >>>> exactly what we need. > >>>> > >>>> Regression tested on arm-none-eabi. > >>>> > >>>> Is this OK for trunk? (Will eventually backport to previous versions if > >>>> stable.) > >>> Ok. > >>> Thanks, > >>> Kyrill > >> As I was getting ready to push this I noticed I didn't add any skip-ifs > >> to prevent this failing with specific target options. So here's a new > >> version with those. > >> > >> Still OK? > >> > > Hi, > > > > This is not sufficient to skip arm-linux-gnueabi* configs built with > > non-default cpu/fpu. > > > > For instance, with arm-linux-gnueabihf --with-cpu=cortex-a9 > > --with-fpu=neon-fp16 --with-float=hard > > I see: > > FAIL: gcc.target/arm/pr95646.c (test for excess errors) > > Excess errors: > > cc1: error: ARMv8-M Security Extensions incompatible with selected FPU > > cc1: error: target CPU does not support ARM mode > > > > and the testcase is compiled with -mcpu=cortex-m23 -mcmse -Os > Resending as I don't think my earlier one made it to the lists (sorry if > you are receiving this double!) > > I'm not following this, before I go off and try to reproduce it, what do > you mean by 'the testcase is compiled with -mcpu=cortex-m23 -mcmse -Os'? > These are the options you are seeing in the log file? Surely they should > override the default options? Only thing I can think of is this might > need an extra -mfloat-abi=soft to make sure it overrides the default > float-abi. Could you give that a try?
No it doesn't make a difference alone. I also had to add: -mfpu=auto (that clears the above warning) -mthumb otherwise we now get cc1: error: target CPU does not support ARM mode Looks like some effective-target machinery is needed Christophe > > Cheers, > Andre > > > > Christophe > > > >> Cheers, > >> Andre > >>>> Cheers, > >>>> Andre > >>>> > >>>> gcc/ChangeLog: > >>>> 2020-06-22 Andre Vieira <andre.simoesdiasvie...@arm.com> > >>>> > >>>> PR target/95646 > >>>> * config/arm/arm.c: > >>>> (cmse_nonsecure_entry_clear_before_return): > >>>> Use 'callee_saved_reg_p' instead of > >>>> 'calL_used_or_fixed_reg_p'. > >>>> > >>>> gcc/testsuite/ChangeLog: > >>>> 2020-06-22 Andre Vieira <andre.simoesdiasvie...@arm.com> > >>>> > >>>> PR target/95646 > >>>> * gcc.target/arm/pr95646.c: New test.
