Hi Segher, on 2020/6/12 上午6:55, Segher Boessenkool wrote: > Hi! > > On Wed, Jun 10, 2020 at 08:39:19PM +0800, Kewen.Lin wrote: >> +;; Define optab for vector access with length vectorization exploitation. >> +(define_expand "lenload<mode>" >> + [(match_operand:VEC_A 0 "vlogical_operand") >> + (match_operand:VEC_A 1 "memory_operand") >> + (match_operand:QI 2 "int_reg_operand")] > > Why this? gpc_reg_operand will just work, no? (Even just > register_operand should, but let's not go there today ;-) ) >
Good question! The existing lxvl requires register_operand, yeah, gpr_reg_operand looks fine too. I was thinking this operand for length would only exist in GPR, int_reg_operand looks more reasonable here? > Okay for trunk with that change, or with some explanation. Thanks! > Thanks! BR, Kewen > > Segher >
