This patch adds support for the two new HWCAP2 fields used by the
__builtin_cpu_supports function. It adds support in the target_clones
attribute for -mcpu=future.
The two new __builtin_cpu_supports tests are:
__builtin_cpu_supports ("isa_3_1")
__builtin_cpu_supports ("mma")
The bits used are the bits that the Linux kernel engineers will be using for
these new features.
gcc/
2020-06-04 Michael Meissner <meiss...@linux.ibm.com>
* config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
'future' PowerPC platform.
(PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
(PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
* config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
MMA HWCAP2 bits.
* config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
(rs6000_clone_map): Add 'future' system target_clones support.
testsuite/
2020-06-04 Michael Meissner <meiss...@linux.ibm.com>
* gcc.target/powerpc/clone3.c: New test for using 'future' with
the target_clones attribute.
---
gcc/config/rs6000/ppc-auxv.h | 6 ++++++
gcc/config/rs6000/rs6000-call.c | 4 +++-
gcc/config/rs6000/rs6000.c | 2 ++
gcc/testsuite/gcc.target/powerpc/clone3.c | 33 +++++++++++++++++++++++++++++++
4 files changed, 44 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/clone3.c
diff --git a/gcc/config/rs6000/ppc-auxv.h b/gcc/config/rs6000/ppc-auxv.h
index 3232931..e51d039 100644
--- a/gcc/config/rs6000/ppc-auxv.h
+++ b/gcc/config/rs6000/ppc-auxv.h
@@ -48,6 +48,9 @@
#define PPC_PLATFORM_POWER8 13
#define PPC_PLATFORM_POWER9 14
+/* This is not yet official. */
+#define PPC_PLATFORM_FUTURE 15
+
/* AT_HWCAP bits. These must match the values defined in the Linux kernel. */
#define PPC_FEATURE_32 0x80000000
#define PPC_FEATURE_64 0x40000000
@@ -93,6 +96,9 @@
#define PPC_FEATURE2_SCV 0x00100000
#define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000
+/* These are not yet official. */
+#define PPC_FEATURE2_ARCH_3_1 0x00040000
+#define PPC_FEATURE2_MMA 0x00020000
/* Thread Control Block (TCB) offsets of the AT_PLATFORM, AT_HWCAP and
AT_HWCAP2 values. These must match the values defined in GLIBC. */
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 0ac8054..817a14c 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -172,7 +172,9 @@ static const struct
{ "arch_3_00", PPC_FEATURE2_ARCH_3_00, 1 },
{ "ieee128", PPC_FEATURE2_HAS_IEEE128, 1 },
{ "darn", PPC_FEATURE2_DARN, 1 },
- { "scv", PPC_FEATURE2_SCV, 1 }
+ { "scv", PPC_FEATURE2_SCV, 1 },
+ { "arch_3_1", PPC_FEATURE2_ARCH_3_1, 1 },
+ { "mma", PPC_FEATURE2_MMA, 1 },
};
static void altivec_init_builtins (void);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index c2ee3b6..3eb8000 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -260,6 +260,7 @@ enum {
CLONE_ISA_2_06, /* ISA 2.06 (power7). */
CLONE_ISA_2_07, /* ISA 2.07 (power8). */
CLONE_ISA_3_00, /* ISA 3.00 (power9). */
+ CLONE_ISA_3_1, /* ISA 3.1 (future). */
CLONE_MAX
};
@@ -275,6 +276,7 @@ static const struct clone_map rs6000_clone_map[CLONE_MAX] =
{
{ OPTION_MASK_POPCNTD, "arch_2_06" }, /* ISA 2.06 (power7). */
{ OPTION_MASK_P8_VECTOR, "arch_2_07" }, /* ISA 2.07 (power8). */
{ OPTION_MASK_P9_VECTOR, "arch_3_00" }, /* ISA 3.00 (power9). */
+ { OPTION_MASK_FUTURE, "arch_3_1" }, /* ISA 3.1 (future). */
};
diff --git a/gcc/testsuite/gcc.target/powerpc/clone3.c
b/gcc/testsuite/gcc.target/powerpc/clone3.c
new file mode 100644
index 0000000..93ee41d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/clone3.c
@@ -0,0 +1,33 @@
+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */
+/* { dg-options "-mdejagnu-cpu=power8 -O2" } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
+
+/* Power9 (aka, ISA 3.0) has a MODSD instruction to do modulus, while Power8
+ (aka, ISA 2.07) has to do modulus with divide and multiply. Make sure
+ both clone functions are generated.
+
+ FUTURE has pc-relative instructions to access static values, while earlier
+ systems used TOC addressing.
+
+ Restrict ourselves to Linux, since IFUNC might not be supported in other
+ operating systems. */
+
+static long s;
+long *p = &s;
+
+__attribute__((target_clones("cpu=future,cpu=power9,default")))
+long mod_func (long a, long b)
+{
+ return (a % b) + s;
+}
+
+long mod_func_or (long a, long b, long c)
+{
+ return mod_func (a, b) | c;
+}
+
+/* { dg-final { scan-assembler-times {\mdivd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mmodsd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpld\M} 1 } } */
--
1.8.3.1
