Hi Srinath, > -----Original Message----- > From: Srinath Parvathaneni <srinath.parvathan...@arm.com> > Sent: 28 May 2020 12:08 > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com> > Subject: [PATCH][GCC] arm: Fix the MVE ACLE vbicq intrinsics. > > Hello, > > Following MVE intrinsic testcases are failing in GCC testsuite. > > Directory: gcc.target/arm/mve/intrinsics/ > Testcases: vbicq_f16.c, vbicq_f32.c, vbicq_s16.c, vbicq_s32.c, vbicq_s8.c > ,vbicq_u16.c, vbicq_u32.c and vbicq_u8.c. > > This patch fixes the vbicq intrinsics by modifying the intrinsic parameters > and polymorphic variants in "arm_mve.h" header file. > > Please refer to M-profile Vector Extension (MVE) intrinsics [1]for more > details. > [1] https://developer.arm.com/architectures/instruction-sets/simd- > isas/helium/mve-intrinsics > > Regression tested on arm-none-eabi and found no regressions. > > Ok for master and gcc-10 branch?
Ok. Thanks, Kyrill > > Thanks, > Srinath. > > gcc/ChangeLog: > > 2020-05-20 Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic > arguments. > (__arm_vbicq_n_s16): Likewise. > (__arm_vbicq_n_u32): Likewise. > (__arm_vbicq_n_s32): Likewise. > (__arm_vbicq): Modify polymorphic variant. > > gcc/testsuite/ChangeLog: > > 2020-05-20 Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * gcc.target/arm/mve/intrinsics/vbicq_f16.c: Modify. > * gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise. > > > ############### Attachment also inlined for ease of reply > ############### > > > diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h > index > 1002512a98f9364403f66eba0e320fe5070bdc3a..9bc5c97db8fea15d8140d966 > bc501b8a457a1abf 100644 > --- a/gcc/config/arm/arm_mve.h > +++ b/gcc/config/arm/arm_mve.h > @@ -6361,7 +6361,7 @@ __arm_vorrq_n_u16 (uint16x8_t __a, const int > __imm) > > __extension__ extern __inline uint16x8_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > -__arm_vbicq_n_u16 (uint16x8_t __a, const uint16_t __imm) > +__arm_vbicq_n_u16 (uint16x8_t __a, const int __imm) > { > return __builtin_mve_vbicq_n_uv8hi (__a, __imm); > } > @@ -6473,7 +6473,7 @@ __arm_vorrq_n_s16 (int16x8_t __a, const int > __imm) > > __extension__ extern __inline int16x8_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > -__arm_vbicq_n_s16 (int16x8_t __a, const int16_t __imm) > +__arm_vbicq_n_s16 (int16x8_t __a, const int __imm) > { > return __builtin_mve_vbicq_n_sv8hi (__a, __imm); > } > @@ -6564,7 +6564,7 @@ __arm_vorrq_n_u32 (uint32x4_t __a, const int > __imm) > > __extension__ extern __inline uint32x4_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > -__arm_vbicq_n_u32 (uint32x4_t __a, const uint32_t __imm) > +__arm_vbicq_n_u32 (uint32x4_t __a, const int __imm) > { > return __builtin_mve_vbicq_n_uv4si (__a, __imm); > } > @@ -6676,7 +6676,7 @@ __arm_vorrq_n_s32 (int32x4_t __a, const int > __imm) > > __extension__ extern __inline int32x4_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > -__arm_vbicq_n_s32 (int32x4_t __a, const int32_t __imm) > +__arm_vbicq_n_s32 (int32x4_t __a, const int __imm) > { > return __builtin_mve_vbicq_n_sv4si (__a, __imm); > } > @@ -23182,7 +23182,7 @@ __arm_vorrq (uint16x8_t __a, const int __imm) > > __extension__ extern __inline uint16x8_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > -__arm_vbicq (uint16x8_t __a, const uint16_t __imm) > +__arm_vbicq (uint16x8_t __a, const int __imm) > { > return __arm_vbicq_n_u16 (__a, __imm); > } > @@ -23294,7 +23294,7 @@ __arm_vorrq (int16x8_t __a, const int __imm) > > __extension__ extern __inline int16x8_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > -__arm_vbicq (int16x8_t __a, const int16_t __imm) > +__arm_vbicq (int16x8_t __a, const int __imm) > { > return __arm_vbicq_n_s16 (__a, __imm); > } > @@ -23385,7 +23385,7 @@ __arm_vorrq (uint32x4_t __a, const int __imm) > > __extension__ extern __inline uint32x4_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > -__arm_vbicq (uint32x4_t __a, const uint32_t __imm) > +__arm_vbicq (uint32x4_t __a, const int __imm) > { > return __arm_vbicq_n_u32 (__a, __imm); > } > @@ -23497,7 +23497,7 @@ __arm_vorrq (int32x4_t __a, const int __imm) > > __extension__ extern __inline int32x4_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > -__arm_vbicq (int32x4_t __a, const int32_t __imm) > +__arm_vbicq (int32x4_t __a, const int __imm) > { > return __arm_vbicq_n_s32 (__a, __imm); > } > @@ -35963,10 +35963,10 @@ extern void *__ARM_undef; > #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ > __typeof(p1) __p1 = (p1); \ > _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, > \ > - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), (const int16_t) > __p1), \ > - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), (const int32_t) > __p1), \ > - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (const uint16_t) > __p1), \ > - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (const uint32_t) > __p1), \ > + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), > __ARM_mve_coerce1 (__p1, int)), \ > + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), > __ARM_mve_coerce1 (__p1, int)), \ > + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), > __ARM_mve_coerce1 (__p1, int)), \ > + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), > __ARM_mve_coerce1 (__p1, int)), \ > int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: > __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), > __ARM_mve_coerce(__p1, int8x16_t)), \ > int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: > __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), > __ARM_mve_coerce(__p1, int16x8_t)), \ > int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: > __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), > __ARM_mve_coerce(__p1, int32x4_t)), \ > @@ -38875,10 +38875,10 @@ extern void *__ARM_undef; > #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ > __typeof(p1) __p1 = (p1); \ > _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, > \ > - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), (const int16_t) > __p1), \ > - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), (const int32_t) > __p1), \ > - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (const uint16_t) > __p1), \ > - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (const uint32_t) > __p1), \ > + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), > __ARM_mve_coerce1 (__p1, int)), \ > + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), > __ARM_mve_coerce1 (__p1, int)), \ > + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), > __ARM_mve_coerce1 (__p1, int)), \ > + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: > __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), > __ARM_mve_coerce1 (__p1, int)), \ > int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: > __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), > __ARM_mve_coerce(__p1, int8x16_t)), \ > int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: > __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), > __ARM_mve_coerce(__p1, int16x8_t)), \ > int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: > __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), > __ARM_mve_coerce(__p1, int32x4_t)), \ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c > index > eed2bc7951e2ffe6c1016ec8986c1513db6cab70..c15f1f91d07071bad5d050ab > 32711176c4c49c7a 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c > @@ -19,3 +19,4 @@ foo1 (float16x8_t a, float16x8_t b) > } > > /* { dg-final { scan-assembler "vbic" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c > index > 5e543dc87a19929b9cb47992cea2a3a603a410e7..c8659d460a052f51a295a17 > 3257cba5f63ccb202 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c > @@ -19,3 +19,4 @@ foo1 (float32x4_t a, float32x4_t b) > } > > /* { dg-final { scan-assembler "vbic" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c > index > ecc48503fc2d2b16c9135c412df22f748874750c..6258727d82f4fa836a1066b9f > 4041c16b54af7aa 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c > @@ -17,3 +17,4 @@ foo1 (int16x8_t a) > } > > /* { dg-final { scan-assembler-times "vbic.i16" 2 } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c > index > 013cdf15cfd974ab82379d95e68b5a1bdf8936ca..be641abf556b56183a50c271 > b384ae9490818c48 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c > @@ -17,3 +17,4 @@ foo1 (int32x4_t a) > } > > /* { dg-final { scan-assembler-times "vbic.i32" 2 } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c > index > b24db154ad874dc016590adb5e99be4e97044a42..0b26ffda0dce4086fafd8a5 > 250f535fe5d519a1b 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c > @@ -17,3 +17,4 @@ foo1 (uint16x8_t a) > } > > /* { dg-final { scan-assembler-times "vbic.i16" 2 } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c > index > 1261fbb523cfb596c272f114dceb8e8024dbc297..47820bd184a12c5764c8eccc > 436340f00d7e93f7 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c > @@ -17,3 +17,4 @@ foo1 (uint32x4_t a) > } > > /* { dg-final { scan-assembler-times "vbic.i32" 2 } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c > index > fe4f15e4bc2400e0c0a7240adaa7a6bb184e06e4..4ffacdd9733325e8b0ba0638 > a11a549cd9bef797 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c > @@ -19,3 +19,4 @@ foo1 (int16x8_t a, int16x8_t b) > } > > /* { dg-final { scan-assembler "vbic" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c > index > 969ccaed426fdbbca56865b603c932f268692592..13fbff407468a3d0a8ac31a17 > 132c181e0f20268 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c > @@ -19,3 +19,4 @@ foo1 (int32x4_t a, int32x4_t b) > } > > /* { dg-final { scan-assembler "vbic" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c > index > c1092dd194dbc7ef2e96565e4ac44d1d29855574..b9fba943a835a0c3e107faac > f2e0004674a4c44f 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c > @@ -19,3 +19,4 @@ foo1 (int8x16_t a, int8x16_t b) > } > > /* { dg-final { scan-assembler "vbic" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c > index > f2856da1ccff4513ab1f4764bb3a6bc27ad1552d..5d94a6396c427834b7631d43 > 38fc921b0c37a54e 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c > @@ -19,3 +19,4 @@ foo1 (uint16x8_t a, uint16x8_t b) > } > > /* { dg-final { scan-assembler "vbic" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c > index > 17c3990dde6986cde217f47396aa682ba7d947cd..893dc3deefcbb05707052b0 > 763ea45eccbea6e4d 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c > @@ -19,3 +19,4 @@ foo1 (uint32x4_t a, uint32x4_t b) > } > > /* { dg-final { scan-assembler "vbic" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c > index > e5da270ccda674ce338b6676f0ad617ee4e08d09..bd5e9bc01971a171d21a7b5 > acb366dcd7e3cf4c6 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c > @@ -19,3 +19,4 @@ foo1 (uint8x16_t a, uint8x16_t b) > } > > /* { dg-final { scan-assembler "vbic" } } */ > +/* { dg-final { scan-assembler-not "__ARM_undef" } } */