Hi:
Bootstrap is ok, regression test on i386/x86-64 backend is ok.
gcc/ChangeLog:
PR target/92658
* config/i386/sse.md
(trunc<pmov_src_lower><mode>2, truncv32hiv32qi2,
trunc<ssedoublemodelower><mode>2): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr92658-avx512f.c: New test.
* gcc.target/i386/pr92658-avx512vl.c: Ditto.
* gcc.target/i386/pr92658-avx512bw-trunc.c: Ditto.
--
BR,
Hongtao
From 3133cde9eb5e187c2e55b74d5c207810717c17a0 Mon Sep 17 00:00:00 2001
From: liuhongt <hongtao....@intel.com>
Date: Wed, 20 May 2020 15:53:14 +0800
Subject: [PATCH] Add missing vector truncmn2 expanders [PR92658]
2020-0520 Hongtao.liu <hongtao....@intel.com>
gcc/ChangeLog:
PR target/92658
* config/i386/sse.md
(trunc<pmov_src_lower><mode>2, truncv32hiv32qi2,
trunc<ssedoublemodelower><mode>2): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr92658-avx512f.c: New test.
* gcc.target/i386/pr92658-avx512vl.c: Ditto.
* gcc.target/i386/pr92658-avx512bw-trunc.c: Ditto.
---
gcc/config/i386/sse.md | 18 ++++
.../gcc.target/i386/pr92658-avx512bw-trunc.c | 73 +++++++++++++++
.../gcc.target/i386/pr92658-avx512f.c | 93 +++++++++++++++++++
.../gcc.target/i386/pr92658-avx512vl.c | 37 ++++++++
4 files changed, 221 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/pr92658-avx512bw-trunc.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr92658-avx512f.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr92658-avx512vl.c
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 9bf4361384a..b0194c62b02 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -10491,6 +10491,12 @@
(define_mode_attr pmov_suff_1
[(V16QI "db") (V16HI "dw") (V8SI "qd") (V8HI "qw")])
+(define_expand "trunc<pmov_src_lower><mode>2"
+ [(set (match_operand:PMOV_DST_MODE_1 0 "nonimmediate_operand")
+ (truncate:PMOV_DST_MODE_1
+ (match_operand:<pmov_src_mode> 1 "register_operand")))]
+ "TARGET_AVX512F")
+
(define_insn "*avx512f_<code><pmov_src_lower><mode>2"
[(set (match_operand:PMOV_DST_MODE_1 0 "nonimmediate_operand" "=v,m")
(any_truncate:PMOV_DST_MODE_1
@@ -10525,6 +10531,12 @@
(match_operand:<avx512fmaskmode> 2 "register_operand")))]
"TARGET_AVX512F")
+(define_expand "truncv32hiv32qi2"
+ [(set (match_operand:V32QI 0 "nonimmediate_operand")
+ (truncate:V32QI
+ (match_operand:V32HI 1 "register_operand")))]
+ "TARGET_AVX512BW")
+
(define_insn "avx512bw_<code>v32hiv32qi2"
[(set (match_operand:V32QI 0 "nonimmediate_operand" "=v,m")
(any_truncate:V32QI
@@ -10564,6 +10576,12 @@
(define_mode_attr pmov_suff_2
[(V16QI "wb") (V8HI "dw") (V4SI "qd")])
+(define_expand "trunc<ssedoublemodelower><mode>2"
+ [(set (match_operand:PMOV_DST_MODE_2 0 "nonimmediate_operand")
+ (truncate:PMOV_DST_MODE_2
+ (match_operand:<ssedoublemode> 1 "register_operand")))]
+ "TARGET_AVX512VL")
+
(define_insn "*avx512vl_<code><ssedoublemodelower><mode>2"
[(set (match_operand:PMOV_DST_MODE_2 0 "nonimmediate_operand" "=v,m")
(any_truncate:PMOV_DST_MODE_2
diff --git a/gcc/testsuite/gcc.target/i386/pr92658-avx512bw-trunc.c b/gcc/testsuite/gcc.target/i386/pr92658-avx512bw-trunc.c
new file mode 100644
index 00000000000..b37535aeb38
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr92658-avx512bw-trunc.c
@@ -0,0 +1,73 @@
+/* PR target/92658 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -mavx512bw -mavx512vl" } */
+
+typedef unsigned char v16qi __attribute__((vector_size (16)));
+typedef unsigned char v32qi __attribute__((vector_size (32)));
+typedef unsigned short v16hi __attribute__((vector_size (32)));
+typedef unsigned short v32hi __attribute__((vector_size (64)));
+
+
+void
+truncwb_512 (v32qi * dst, v32hi * __restrict src)
+{
+ unsigned char tem[8];
+ tem[0] = (*src)[0];
+ tem[1] = (*src)[1];
+ tem[2] = (*src)[2];
+ tem[3] = (*src)[3];
+ tem[4] = (*src)[4];
+ tem[5] = (*src)[5];
+ tem[6] = (*src)[6];
+ tem[7] = (*src)[7];
+ tem[8] = (*src)[8];
+ tem[9] = (*src)[9];
+ tem[10] = (*src)[10];
+ tem[11] = (*src)[11];
+ tem[12] = (*src)[12];
+ tem[13] = (*src)[13];
+ tem[14] = (*src)[14];
+ tem[15] = (*src)[15];
+ tem[16] = (*src)[16];
+ tem[17] = (*src)[17];
+ tem[18] = (*src)[18];
+ tem[19] = (*src)[19];
+ tem[20] = (*src)[20];
+ tem[21] = (*src)[21];
+ tem[22] = (*src)[22];
+ tem[23] = (*src)[23];
+ tem[24] = (*src)[24];
+ tem[25] = (*src)[25];
+ tem[26] = (*src)[26];
+ tem[27] = (*src)[27];
+ tem[28] = (*src)[28];
+ tem[29] = (*src)[29];
+ tem[30] = (*src)[30];
+ tem[31] = (*src)[31];
+ dst[0] = *(v32qi *) tem;
+}
+
+void
+truncwb_256 (v16qi * dst, v16hi * __restrict src)
+{
+ unsigned char tem[8];
+ tem[0] = (*src)[0];
+ tem[1] = (*src)[1];
+ tem[2] = (*src)[2];
+ tem[3] = (*src)[3];
+ tem[4] = (*src)[4];
+ tem[5] = (*src)[5];
+ tem[6] = (*src)[6];
+ tem[7] = (*src)[7];
+ tem[8] = (*src)[8];
+ tem[9] = (*src)[9];
+ tem[10] = (*src)[10];
+ tem[11] = (*src)[11];
+ tem[12] = (*src)[12];
+ tem[13] = (*src)[13];
+ tem[14] = (*src)[14];
+ tem[15] = (*src)[15];
+ dst[0] = *(v16qi *) tem;
+}
+
+/* { dg-final { scan-assembler-times "vpmovwb" 2 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr92658-avx512f.c b/gcc/testsuite/gcc.target/i386/pr92658-avx512f.c
new file mode 100644
index 00000000000..c59eebfd550
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr92658-avx512f.c
@@ -0,0 +1,93 @@
+/* PR target/92658 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -mavx512f" } */
+
+typedef unsigned char v8qi __attribute__((vector_size (8)));
+typedef unsigned char v16qi __attribute__((vector_size (16)));
+typedef unsigned short v8hi __attribute__((vector_size (16)));
+typedef unsigned short v16hi __attribute__((vector_size (32)));
+typedef unsigned int v8si __attribute__((vector_size (32)));
+typedef unsigned int v16si __attribute__((vector_size (64)));
+typedef unsigned long long v8di __attribute__((vector_size (64)));
+
+void
+truncqd (v8si * dst, v8di * __restrict src)
+{
+ unsigned tem[8];
+ tem[0] = (*src)[0];
+ tem[1] = (*src)[1];
+ tem[2] = (*src)[2];
+ tem[3] = (*src)[3];
+ tem[4] = (*src)[4];
+ tem[5] = (*src)[5];
+ tem[6] = (*src)[6];
+ tem[7] = (*src)[7];
+ dst[0] = *(v8si *) tem;
+}
+
+void
+truncqw (v8hi * dst, v8di * __restrict src)
+{
+ unsigned short tem[8];
+ tem[0] = (*src)[0];
+ tem[1] = (*src)[1];
+ tem[2] = (*src)[2];
+ tem[3] = (*src)[3];
+ tem[4] = (*src)[4];
+ tem[5] = (*src)[5];
+ tem[6] = (*src)[6];
+ tem[7] = (*src)[7];
+ dst[0] = *(v8hi *) tem;
+}
+
+void
+truncdw (v16hi * dst, v16si * __restrict src)
+{
+ unsigned short tem[8];
+ tem[0] = (*src)[0];
+ tem[1] = (*src)[1];
+ tem[2] = (*src)[2];
+ tem[3] = (*src)[3];
+ tem[4] = (*src)[4];
+ tem[5] = (*src)[5];
+ tem[6] = (*src)[6];
+ tem[7] = (*src)[7];
+ tem[8] = (*src)[8];
+ tem[9] = (*src)[9];
+ tem[10] = (*src)[10];
+ tem[11] = (*src)[11];
+ tem[12] = (*src)[12];
+ tem[13] = (*src)[13];
+ tem[14] = (*src)[14];
+ tem[15] = (*src)[15];
+ dst[0] = *(v16hi *) tem;
+}
+
+
+void
+truncdb (v16qi * dst, v16si * __restrict src)
+{
+ unsigned char tem[8];
+ tem[0] = (*src)[0];
+ tem[1] = (*src)[1];
+ tem[2] = (*src)[2];
+ tem[3] = (*src)[3];
+ tem[4] = (*src)[4];
+ tem[5] = (*src)[5];
+ tem[6] = (*src)[6];
+ tem[7] = (*src)[7];
+ tem[8] = (*src)[8];
+ tem[9] = (*src)[9];
+ tem[10] = (*src)[10];
+ tem[11] = (*src)[11];
+ tem[12] = (*src)[12];
+ tem[13] = (*src)[13];
+ tem[14] = (*src)[14];
+ tem[15] = (*src)[15];
+ dst[0] = *(v16qi *) tem;
+}
+
+/* { dg-final { scan-assembler-times "vpmovqd" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovqw" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovdw" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovdb" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr92658-avx512vl.c b/gcc/testsuite/gcc.target/i386/pr92658-avx512vl.c
new file mode 100644
index 00000000000..c6f748ca458
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr92658-avx512vl.c
@@ -0,0 +1,37 @@
+/* PR target/92658 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -mavx512f -mavx512vl" } */
+
+typedef unsigned short v8hi __attribute__((vector_size (16)));
+typedef unsigned int v4si __attribute__((vector_size (16)));
+typedef unsigned int v8si __attribute__((vector_size (32)));
+typedef unsigned long long v4di __attribute__((vector_size (32)));
+
+void
+truncqd_256 (v4si * dst, v4di * __restrict src)
+{
+ unsigned tem[4];
+ tem[0] = (*src)[0];
+ tem[1] = (*src)[1];
+ tem[2] = (*src)[2];
+ tem[3] = (*src)[3];
+ dst[0] = *(v4si *) tem;
+}
+
+void
+truncdw_256 (v8hi * dst, v8si * __restrict src)
+{
+ unsigned short tem[8];
+ tem[0] = (*src)[0];
+ tem[1] = (*src)[1];
+ tem[2] = (*src)[2];
+ tem[3] = (*src)[3];
+ tem[4] = (*src)[4];
+ tem[5] = (*src)[5];
+ tem[6] = (*src)[6];
+ tem[7] = (*src)[7];
+ dst[0] = *(v8hi *) tem;
+}
+
+/* { dg-final { scan-assembler-times "vpmovqd" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovdw" 1 } } */
--
2.18.1
