On Sun, May 10, 2020 at 9:14 AM Bill Schmidt <wschm...@linux.ibm.com> wrote: > > From: Kelvin Nilsen <kel...@gcc.gnu.org> > > Add new insns vextdu[bhw]vlx, vextddvlx, vextdu[bhw]vhx, and > vextddvhx, along with built-in access and overloaded built-in > access to these insns. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions, using a Power9 configuration. Is this okay for > master? > > Thanks, > Bill > > [gcc] > > 2020-05-10 Kelvin Nilsen <kel...@gcc.gnu.org> > > * config/rs6000/altivec.h (vec_extractl): New #define. > (vec_extracth): Likewise. > * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant. > (UNSPEC_EXTRACTR): Likewise. > (VEXTRACT_LR): New int iterator.
Well now the previous VSTRIR/VSTRIL patch is inconsistent. If we're going to use an iterator for "LR", that's fine, but it needs to be used consistently for similar situations. The approach for the two, similar instructions and issues need to match. Thanks, David
