Hi Anton,
> -----Original Message-----
> From: Anton Youdkevitch <anton.youdkevi...@bell-sw.com>
> Sent: 27 April 2020 11:24
> To: gcc-patches@gcc.gnu.org
> Cc: Richard Earnshaw <richard.earns...@arm.com>; Kyrylo Tkachov
> <kyrylo.tkac...@arm.com>; James Greenhalgh
> <james.greenha...@arm.com>; Richard Sandiford
> <richard.sandif...@arm.com>; jjo...@marvell.com
> Subject: [PATCH v5] aarch64: Add TX3 machine model
>
> Here is the patch introducing thunderx3t110 machine model
> for the scheduler. A name for the new chip was added to the
> list of the names to be recognized as a valid parameter for
> mcpu and mtune flags. Added the TX3 tuning table and cost
> model tables.
>
> Added the new chip name to the documentation. Fixed copyright
> names and dates.
>
> Lowering the chip capabilities to v8.3 to be on the safe side.
>
> Bootstrapped on AArch64.
>
> 2020-04-27 Anton Youdkevitch <anton.youdkevi...@bell-sw.com>
>
> * config/aarch64/aarch64-cores.def: Add the chip name.
> * config/aarch64/aarch64-tune.md: Regenerated.
> * config/aarch64/aarch64.c: Add tuning table for the chip.
> * gcc/config/aarch64/aarch64-cost-tables.h: Add cost tables.
> * config/aarch64/thunderx3t110.md: New file: add the new
> machine model for the scheduler
> * config/aarch64/aarch64.md: Include the new model.
> * doc/invoke.texi: Add the new name to the list
>
>
> ---
> gcc/config/aarch64/aarch64-cores.def | 3 +
> gcc/config/aarch64/aarch64-cost-tables.h | 103 +++
> gcc/config/aarch64/aarch64-tune.md | 2 +-
> gcc/config/aarch64/aarch64.c | 83 ++
> gcc/config/aarch64/aarch64.md | 1 +
> gcc/config/aarch64/thunderx3t110.md | 686 +++++++++++++++
> gcc/doc/invoke.texi | 2 +-
> 7 files changed, 878 insertions(+), 2 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-cores.def
b/gcc/config/aarch64/aarch64-cores.def
index ea9b98b..4d8605a 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -95,6 +95,9 @@ AARCH64_CORE("vulcan", vulcan, thunderx2t99, 8_1A,
AARCH64_FL_FOR_ARCH8_1 | AA
/* Cavium ('C') cores. */
AARCH64_CORE("thunderx2t99", thunderx2t99, thunderx2t99, 8_1A,
AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x43, 0x0af, -1)
+/* Marvell cores (TX3). */
+AARCH64_CORE("thunderx3t110", thunderx3t110, thunderx3t110, 8_3A,
AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_CRYPTO | AARCH64_FL_RCPC | AARCH64_FL_SM4 |
AARCH64_FL_SHA3 | AARCH64_FL_F16FML | AARCH64_FL_RCPC8_4, thunderx3t110, 0x43,
0x0b8, 0x0a)
+
Please move this to a new section with a comment /* ARMv8.3-A Architecture
processors*/
So that we're consistent with the format of the file.
Ok with that change.
Kyrill
/* ARMv8.2-A Architecture Processors. */
