The emulation of mffsl with mffs, used when !TARGET_P9_MISC, is going
through the motions, but not storing the result in the given
operands[0]; it rather modifies operands[0] without effect. It also
creates a DImode pseudo that it doesn't use, a DFmode pseudo that's
unnecessary AFAICT, and it's not indented per the GNU Coding
Standards. The patch below fixes all of these.
I wasn't sure simplify_gen_subreg might possibly emit any code in
obscure cases, so I left it in place, and accommodated the possibility
that the result of the mode conversion back might need copying to the
requested output operand. In my tests, the output was always a
REG:DF, so the subreg was trivial and the conversion back got the
original REG:DF output back.
I'm concerned about several issues in the mffsl testcase. First, I
don't see that comparing the values as doubles rather than as long
longs is desirable. These are FPSCR bitfields, not FP numbers. I
understand mffs et al use double because they output to FP registers,
but... The bit patterns might not even be well-formed FP numbers.
Another issue with the test is that, if the compare fails, it calls
mffsl again to print the value, as if it would yield the same result.
But part of the FPSCR that mffsl (emulated with mmfl or not) copies to
the output FP register is the FPCC, so the fcmpu used to compare the
result of the first mmfsl will modify FPSCR and thus the result of the
second mmfsl call.
Yet another issue is that the test assumed the mmfs bits not extracted
by mffsl are all zero. This appears to be the case, as the bits left
out are for sticky exceptions, but there are reserved parts of FPSCR
that might turn out to be set in the future, and then the masking in
the GCC-emulated version of mffsl would zero out those bits and cause
the compare to fail.
So I put in masking in the mffs result before the compare, but then,
what if mffsl is changed so that it copies additional nonzero bits?
Should we mask both mffs and mffsl outputs? Or is it safe to leave
those bits alone and assume them to be zero at the entry point of
main(), as the test used to do?
Regstrapped on powerpc64le-linux-gnu. Ok to install?
for gcc/ChangeLog
* gcc/config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
output operand in emulation. Simplify.
for gcc/testsuite/ChangeLog
* gcc.target/powerpc/test_mffsl.c: Call mffsl only once.
Reinterpret the doubles as long longs for compares. Mask out
mffs bits that are not expected from mffsl.
---
gcc/config/rs6000/rs6000.md | 26 +++++++++++++------------
gcc/testsuite/gcc.target/powerpc/test_mffsl.c | 12 ++++++++----
2 files changed, 22 insertions(+), 16 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 11ab745..8f1ab55 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -13620,18 +13620,20 @@
if (!TARGET_P9_MISC)
{
- rtx tmp_di = gen_reg_rtx (DImode);
- rtx tmp_df = gen_reg_rtx (DFmode);
-
- /* The mffs instruction reads the entire FPSCR. Emulate the mffsl
- instruction using the mffs instruction and masking off the bits
- the mmsl instruciton actually reads. */
- emit_insn (gen_rs6000_mffs (tmp_df));
- tmp_di = simplify_gen_subreg (DImode, tmp_df, DFmode, 0);
- emit_insn (gen_anddi3 (tmp_di, tmp_di, GEN_INT (0x70007f0ffLL)));
-
- operands[0] = simplify_gen_subreg (DFmode, tmp_di, DImode, 0);
- DONE;
+ rtx tmp_df = operands[0];
+ rtx tmp_di;
+
+ /* The mffs instruction reads the entire FPSCR. Emulate the mffsl
+ instruction using the mffs instruction and masking off the bits
+ the mmsl instruciton actually reads. */
+ emit_insn (gen_rs6000_mffs (tmp_df));
+ tmp_di = simplify_gen_subreg (DImode, tmp_df, DFmode, 0);
+ emit_insn (gen_anddi3 (tmp_di, tmp_di, GEN_INT (0x70007f0ffLL)));
+
+ tmp_df = simplify_gen_subreg (DFmode, tmp_di, DImode, 0);
+ if (operands[0] != tmp_df)
+ emit_move_insn (operands[0], tmp_df);
+ DONE;
}
emit_insn (gen_rs6000_mffsl_hw (operands[0]));
diff --git a/gcc/testsuite/gcc.target/powerpc/test_mffsl.c
b/gcc/testsuite/gcc.target/powerpc/test_mffsl.c
index 93a8ec2..a1f73aa 100644
--- a/gcc/testsuite/gcc.target/powerpc/test_mffsl.c
+++ b/gcc/testsuite/gcc.target/powerpc/test_mffsl.c
@@ -14,17 +14,21 @@ int main ()
union blah {
double d;
unsigned long long ll;
- } conv_val;
+ } mffs_val, mffsl_val;
/* Test reading the FPSCR register. */
__asm __volatile ("mffs %0" : "=f"(f14));
- conv_val.d = f14;
+ mffs_val.d = f14;
+ /* Select the bits obtained by mffsl. */
+ mffs_val.ll &= 0x70007f0ffLL;
- if (conv_val.d != __builtin_mffsl())
+ mffsl_val.d = __builtin_mffsl ();
+
+ if (mffs_val.ll != mffsl_val.ll)
{
#ifdef DEBUG
printf("ERROR, __builtin_mffsl() returned 0x%llx, not the expecected
value 0x%llx\n",
- __builtin_mffsl(), conv_val.d);
+ mffsl_val.ll, mffs_val.ll);
#else
abort();
#endif
--
Alexandre Oliva, freedom fighter he/him https://FSFLA.org/blogs/lxo/
Free Software Evangelist Stallman was right, but he's left :(
GNU Toolchain Engineer Live long and free, and prosper ethically
