For future architecture with prefix instructions, always use plq
rather than lq for atomi load of quadword. Then we never have to
do the doubleword swap on little endian. Before this fix, -mno-pcrel
would generate lq with the doubleword swap (which was ok) and -mpcrel
would generate plq, also with the doubleword swap, which was wrong.
OK for trunk if regstrap passes on ppc64le power9?
Thanks,
Aaron
2020-04-20 Aaron Sawdey <acsaw...@linux.ibm.com>
PR target/94622
* config/rs6000/sync.md (load_quadpti): Make this have attr prefixed
if TARGET_PREFIXED.
(atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
plq will be used and doesn't need it.
---
gcc/config/rs6000/sync.md | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/sync.md b/gcc/config/rs6000/sync.md
index f27edc77b6a..64dfda6ef75 100644
--- a/gcc/config/rs6000/sync.md
+++ b/gcc/config/rs6000/sync.md
@@ -129,7 +129,10 @@ (define_insn "load_quadpti"
"TARGET_SYNC_TI
&& !reg_mentioned_p (operands[0], operands[1])"
"lq %0,%1"
- [(set_attr "type" "load")])
+ [(set_attr "type" "load")
+ (set_attr "prefixed" (if_then_else (match_test "TARGET_PREFIXED")
+ (const_string "yes")
+ (const_string "no")))])
(define_expand "atomic_load<mode>"
[(set (match_operand:AINT 0 "register_operand") ;; output
@@ -162,7 +165,7 @@ (define_expand "atomic_load<mode>"
emit_insn (gen_load_quadpti (pti_reg, op1));
- if (WORDS_BIG_ENDIAN)
+ if (WORDS_BIG_ENDIAN || TARGET_PREFIXED)
emit_move_insn (op0, gen_lowpart (TImode, pti_reg));
else
{
--
2.17.1
