> I think there are two problems with this: > > (1) It never actually checks whether the hard register is valid for the > outer mode (in the hard_regno_mode_ok sense). If it isn't, any attempt > to reload in the outer mode is likely to cycle, because the implied > regno/mode combination will be just as invalid next time > curr_insn_transform sees the subreg. > > (2) The check is valid for little-endian only. For big-endian we need > to move hard_regno backwards. > > Using simplify_subreg_regno should avoid both problems.
We have apparently a cycle in LRA on the SPARC, see PR rtl-opt/92303. -- Eric Botcazou
