The IRA changes twidded the register allocations slightly. Again I verified
that the code should be same from a runtime performance and codesize
perspective.
Committing momentarily.
Jeff
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0ea4ffcc5f9..9b2df5596d7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,7 @@
2020-02-29 Jeff Law <l...@redhat.com>
+ * gcc.target/or1k/return-2.c: Update expected output.
+
* gcc.target/xstormy16/sfr/06_sfrw_to_var.c: Update expected output.
2020-02-28 Iain Sandoe <i...@sandoe.co.uk>
diff --git a/gcc/testsuite/gcc.target/or1k/return-2.c b/gcc/testsuite/gcc.target/or1k/return-2.c
index c072ae23142..add3720c88e 100644
--- a/gcc/testsuite/gcc.target/or1k/return-2.c
+++ b/gcc/testsuite/gcc.target/or1k/return-2.c
@@ -16,4 +16,4 @@ struct a getstruct (long aa) {
/* Ensure our return value is returned on stack. */
/* { dg-final { scan-assembler-not "r12," } } */
/* { dg-final { scan-assembler "l.or\\s+r11, r3, r3" } } */
-/* { dg-final { scan-assembler-times "l.sw\\s+\\d+.r3.," 3 } } */
+/* { dg-final { scan-assembler-times "l.sw\\s+\\d+.r11.," 3 } } */
