The following patch is dealing with arm failures after submitting
original patch for PR93564.
Changing heuristics in the original patch resulted in different order
of allocation and creating gaps in hard reg file which were not enough
for pseudos requiring double regs. So RA started to use caller-saved
regs and additional store/load insns in function prologue. That is the
reason for some arm failures.
The patch was successfully bootstrapped and benchmarked on x86-64.
On x86-64 SPEC2000 the patch generates a bit smaller and faster in
average code.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f6a9ae2375e..1451807f7d9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2020-02-28 Vladimir Makarov <vmaka...@redhat.com>
+
+ PR rtl-optimization/93564
+ * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
+ do not honor reg alloc order.
+
2020-02-27 Joel Hutton <joel.hut...@arm.com>
PR target/87612
diff --git a/gcc/ira-color.c b/gcc/ira-color.c
index 0ffdd192020..a2bf108c38e 100644
--- a/gcc/ira-color.c
+++ b/gcc/ira-color.c
@@ -1925,7 +1925,9 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
}
if (min_cost > cost)
min_cost = cost;
- if (min_full_cost > full_cost)
+ if (min_full_cost > full_cost
+ || (!HONOR_REG_ALLOC_ORDER && min_full_cost == full_cost
+ && best_hard_regno > hard_regno))
{
min_full_cost = full_cost;
best_hard_regno = hard_regno;
