The recent IRA changes twiddled register allocation. Not surprisingly
there's a bit of fallout.
On the PA we've started failing one of the shadd tests which was
triggered by the IRA changes. In simplest terms the register
allocations changed, which obviously changes the hard registers live at
any given point. That in turn changes some of the decisions in the
delay slot filling code.
One of the delay slot filling strategies is to try to fill the delay
slot of a branch with the insn at the target of the branch. If the
target of the branch is reached from multiple points, then we actually
make a copy of that candidate insn (for the delay slot) and change the
branch to target the next insn. ie
[ ... ]
L<target>:
candidate_insn
[ ... ]
b L<target>
delay slot
L<target> can be reached either via the fallthru path or via the branch
(and possibly other branches). To fill the slot we transform that
into:
[ ... ]
L<target>:
candidate_insn
L<target'>:
[ ... ]
b L<target'>
copy of candidate_insn
The test in question counts the number of shadd insns as a proxy for
other behavior prior to delay slot filling. Obviously this kind of
slot filling can change the number of shadd insns in the resulting
assembly code which brings a undesirable degree of instability to the
test.
This change does two things.
First, it disables delay slot filling for the test so improve the
test's stability.
Second, it adjusts the expected count of shadd insns.
Committed to the trunk.
Jeff
commit f976fe0937c2b46880628c2e2749ca3a788c5db0
Author: Jeff Law <l...@redhat.com>
Date: Wed Feb 5 10:00:48 2020 -0700
Fix testsuite "regression" on hppa after recent IRA changes.
* gcc.target/hppa/shadd-3.c: Disable delay slot filling and
adjust expected shadd insn count appropriately.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f6291df9795..0a6513e666b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-02-05 Jeff Law <l...@redhat.com>
+
+ * gcc.target/hppa/shadd-3.c: Disable delay slot filling and
+ adjust expected shadd insn count appropriately.
+
2020-02-05 David Malcolm <dmalc...@redhat.com>
* gcc.dg/analyzer/data-model-1.c: Update for changed output to
diff --git a/gcc/testsuite/gcc.target/hppa/shadd-3.c
b/gcc/testsuite/gcc.target/hppa/shadd-3.c
index f0443ea9977..2d0b648f384 100644
--- a/gcc/testsuite/gcc.target/hppa/shadd-3.c
+++ b/gcc/testsuite/gcc.target/hppa/shadd-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -fno-delayed-branch" } */
/* In this test we want to verify that combine canonicalizes the
MULT into an ASHIFT which in turn allows postreload-gcse to
find the common subexpression.
@@ -8,8 +8,9 @@
for parsing here, so we count the shadd insns. More is not
necessarily better in this test. If this test is too fragile
over time we'll have to revisit the combine and/or postreload
- dumps. */
-/* { dg-final { scan-assembler-times "sh.add" 5 } } */
+ dumps. Note we have disabled delay slot filling to improve
+ test stability. */
+/* { dg-final { scan-assembler-times "sh.add" 4 } } */
extern void oof (void);
typedef struct simple_bitmap_def *sbitmap;
