[PATCH] riscv: Fix up riscv_rtx_costs for RTL checking (PR target/93333)

[Jakub Jelinek]

Hi!

As mentioned in the PR, during combine rtx_costs can be called sometimes
even on RTL that has not been validated yet and so can contain even operands
that aren't valid in any instruction.

The following patch ought to fix this case, ok for trunk?

2020-01-21  Jakub Jelinek  <ja...@redhat.com>

        PR target/93333
        * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
        the last two operands are CONST_INT_P before using them as such.

        * gcc.c-torture/compile/pr93333.c: New test.

--- gcc/config/riscv/riscv.c.jj 2020-01-21 09:14:07.500268371 +0100
+++ gcc/config/riscv/riscv.c    2020-01-21 09:27:37.629974828 +0100
@@ -1642,7 +1642,10 @@ riscv_rtx_costs (rtx x, machine_mode mod
 
     case ZERO_EXTRACT:
       /* This is an SImode shift.  */
-      if (outer_code == SET && (INTVAL (XEXP (x, 2)) > 0)
+      if (outer_code == SET
+         && CONST_INT_P (XEXP (x, 1))
+         && CONST_INT_P (XEXP (x, 2))
+         && (INTVAL (XEXP (x, 2)) > 0)
          && (INTVAL (XEXP (x, 1)) + INTVAL (XEXP (x, 2)) == 32))
        {
          *total = COSTS_N_INSNS (SINGLE_SHIFT_COST);
--- gcc/testsuite/gcc.c-torture/compile/pr93333.c.jj    2020-01-21 
09:27:25.710155732 +0100
+++ gcc/testsuite/gcc.c-torture/compile/pr93333.c       2020-01-21 
09:27:08.234420958 +0100
@@ -0,0 +1,10 @@
+/* PR target/93333 */
+
+unsigned
+foo (int b, int c, int d, unsigned long e, int x, int y, int g, int h,
+     unsigned i)
+{
+  e >>= b;
+  i >>= e & 31;
+  return i & 1;
+}

        Jakub