Hi,

On Thu, 16 Jan 2020 at 16:59, Stam Markianos-Wright
<stam.markianos-wri...@arm.com> wrote:
>
>
>
> On 1/13/20 10:05 AM, Kyrill Tkachov wrote:
> > Hi Stam,
> >
> > On 1/10/20 6:45 PM, Stam Markianos-Wright wrote:
> >> Hi all,
> >>
> >> This is a respin of patch:
> >>
> >> https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01448.html
> >>
> >> which has now been split into two (similar to the Aarch64 version).
> >>
> >> This is patch 1 of 2 and adds Bfloat type support to the ARM back-end.
> >> It also adds a new machine_mode (BFmode) for this type and accompanying 
> >> Vector
> >> modes V4BFmode and V8BFmode.
> >>
> >> The second patch in this series uses existing target hooks to restrict 
> >> type use.
> >>
> >> Regression testing on arm-none-eabi passed successfully.
> >>
> >> This patch depends on:
> >>
> >> https://gcc.gnu.org/ml/gcc-patches/2019-12/msg00857.html
> >>
> >> for test suite effective_target update.
> >>
> >> Ok for trunk?
> >
> > This is ok, thanks.
> >
> > You can commit it once the git conversion goes through :)
>
> Committed as r10-6020-g2e87b2f4121fe1d39edb76f4e492dfe327be6a1b
>

This since commit, I've noticed many ICEs like:
Executing on host:
/aci-gcc-fsf/builds/gcc-fsf-gccsrc-thumb/obj-arm-none-eabi/gcc3/gcc/xgcc
-B/aci-gcc-fsf/builds/gcc-fsf-gccsrc-thumb/obj-arm-none-eabi/gcc3/gcc/
/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-1.c
-fno-diagnostics-show-caret -fno-diagnostics-show-line-numbers
-fdiagnostics-color=never  -fdiagnostics-urls=never    -O0
-mfp16-format=ieee       -lm  -o ./arm-fp16-ops-1.exe    (timeout =
800)
spawn -ignore SIGHUP
/aci-gcc-fsf/builds/gcc-fsf-gccsrc-thumb/obj-arm-none-eabi/gcc3/gcc/xgcc
-B/aci-gcc-fsf/builds/gcc-fsf-gccsrc-thumb/obj-arm-none-eabi/gcc3/gcc/
/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-1.c
-fno-diagnostics-show-caret -fno-diagnostics-show-line-numbers
-fdiagnostics-color=never -fdiagnostics-urls=never -O0
-mfp16-format=ieee -lm -o ./arm-fp16-ops-1.exe
during RTL pass: expand
In file included from /gcc/testsuite/gcc.dg/torture/arm-fp16-ops.h:3,
                 from /gcc/testsuite/gcc.dg/torture/arm-fp16-ops-1.c:5:
/gcc/testsuite/gcc.dg/torture/arm-fp16-ops.h: In function 'main':
/gcc/testsuite/gcc.dg/torture/arm-fp16-ops.h:31:12: internal compiler
error: in convert_mode_scalar, at expr.c:328
/gcc/testsuite/gcc.dg/torture/arm-fp16-ops.h:31:3: note: in expansion
of macro 'CHECK'
0x8cb089 convert_mode_scalar
        /gcc/expr.c:325
0x8cb089 convert_move(rtx_def*, rtx_def*, int)
        /gcc/expr.c:297
0x8cb32f convert_modes(machine_mode, machine_mode, rtx_def*, int)
        /gcc/expr.c:737
0xb8b2a0 expand_binop(machine_mode, optab_tag, rtx_def*, rtx_def*,
rtx_def*, int, optab_methods)
        /gcc/optabs.c:1895
0x8bdebc expand_expr_real_2(separate_ops*, rtx_def*, machine_mode,
expand_modifier)
        /gcc/expr.c:9847
0x77e52a expand_gimple_stmt_1
        /gcc/cfgexpand.c:3784
0x77e52a expand_gimple_stmt
        /gcc/cfgexpand.c:3844
0x78068d expand_gimple_basic_block
        /gcc/cfgexpand.c:5884
0x78279c execute
        /gcc/cfgexpand.c:6539

This example is for gcc.dg/torture/arm-fp16-ops-1.c target arm-none-eabi.

You said you saw no regressions, am I missing something?
(this is still true as of todays' daily-bump
bec238768255acf0fe5b0993d05cf99f6331b79e)

Thanks,

Christophe



> Thank you!
> Stam
> >
> > Kyrill
> >
> >
> >>
> >> Cheers,
> >> Stam
> >>
> >>
> >> ACLE documents are at https://developer.arm.com/docs/101028/latest
> >> ISA documents are at https://developer.arm.com/docs/ddi0596/latest
> >>
> >> Details on ARM Bfloat can be found here:
> >> https://community.arm.com/developer/ip-products/processors/b/ml-ip-blog/posts/bfloat16-processing-for-neural-networks-on-armv8_2d00_a
> >>
> >>
> >>
> >>
> >> gcc/ChangeLog:
> >>
> >> 2020-01-10  Stam Markianos-Wright <stam.markianos-wri...@arm.com>
> >>
> >>         * config.gcc: Add arm_bf16.h.
> >>         * config/arm/arm-builtins.c (arm_mangle_builtin_type):  Fix 
> >> comment.
> >>         (arm_simd_builtin_std_type): Add BFmode.
> >>         (arm_init_simd_builtin_types): Define element types for vector 
> >> types.
> >>         (arm_init_bf16_types):  New function.
> >>         (arm_init_builtins): Add arm_init_bf16_types function call.
> >>         * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
> >>         * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
> >>         * config/arm/arm.c (aapcs_vfp_sub_candidate):  Add BFmode.
> >>         (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
> >>         (arm_vector_mode_supported_p): Add V4BF, V8BF.
> >>         (arm_mangle_type):
> >>         * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
> >>           VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
> >>           arm_bf16_ptr_type_node.
> >>         * config/arm/arm.md: New enabled_for_bfmode_scalar,
> >>           enabled_for_bfmode_vector attributes. Add BFmode to movhf expand.
> >>           pattern and define_split between ARM registers.
> >>         * config/arm/arm_bf16.h: New file.
> >>         * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
> >>         * config/arm/iterators.md (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): 
> >> New.
> >>           (VQXMOV): Add V8BF.
> >>         * config/arm/neon.md: Add BF vector types to NEON move patterns.
> >>         * config/arm/vfp.md: Add BFmode to movhf patterns.
> >>
> >> gcc/testsuite/ChangeLog:
> >>
> >> 2020-01-10  Stam Markianos-Wright <stam.markianos-wri...@arm.com>
> >>
> >>         * g++.dg/abi/mangle-neon.C: Add Bfloat vector types.
> >>         * g++.dg/ext/arm-bf16/bf16-mangle-1.C: New test.
> >>         * gcc.target/arm/bfloat16_scalar_1_1.c: New test.
> >>         * gcc.target/arm/bfloat16_scalar_1_2.c: New test.
> >>         * gcc.target/arm/bfloat16_scalar_2_1.c: New test.
> >>         * gcc.target/arm/bfloat16_scalar_2_2.c: New test.
> >>         * gcc.target/arm/bfloat16_scalar_3_1.c: New test.
> >>         * gcc.target/arm/bfloat16_scalar_3_2.c: New test.
> >>         * gcc.target/arm/bfloat16_scalar_4.c: New test.
> >>         * gcc.target/arm/bfloat16_simd_1_1.c: New test.
> >>         * gcc.target/arm/bfloat16_simd_1_2.c: New test.
> >>         * gcc.target/arm/bfloat16_simd_2_1.c: New test.
> >>         * gcc.target/arm/bfloat16_simd_2_2.c: New test.
> >>         * gcc.target/arm/bfloat16_simd_3_1.c: New test.
> >>         * gcc.target/arm/bfloat16_simd_3_2.c: New test.
> >>
> >>
> >>

Reply via email to