[PATCH] Optimize decl %eax; cmpl $-1, %eax; jne .Lxx into subl $1, %eax; jnc .Lxx using peephole2 (PR target/93002)

[Jakub Jelinek]

Hi!

The following patch optimizes
decl %eax; cmpl $-1, %eax; jne .Lxx;
into shorter and even possible to be fused:
subl $1, %eax; jnc .Lxx;

Bootstrapped/regtested on x86_64-linux and i686-linux, during which
this peephole2 triggered 7825 times, ok for trunk?

2019-12-19  Jakub Jelinek  <ja...@redhat.com>

        PR target/93002
        * config/i386/i386.md (dec reg; cmp $-1, reg; jne lab): New
        define_peephole2.

        * gcc.target/i386/pr93002.c: New test.

--- gcc/config/i386/i386.md.jj  2019-12-17 21:39:26.686939030 +0100
+++ gcc/config/i386/i386.md     2019-12-19 13:31:52.424108730 +0100
@@ -6503,6 +6503,36 @@ (define_peephole2
   [(set (reg:CC FLAGS_REG)
        (compare:CC (match_dup 0) (match_dup 1)))])
 
+;; decl %eax; cmpl $-1, %eax; jne .Lxx; can be optimized into
+;; subl $1, %eax; jnc .Lxx;
+(define_peephole2
+  [(parallel
+     [(set (match_operand:SWI 0 "general_reg_operand")
+          (plus:SWI (match_dup 0) (const_int -1)))
+      (clobber (reg FLAGS_REG))])
+   (set (reg:CCZ FLAGS_REG)
+       (compare:CCZ (match_dup 0) (const_int -1)))
+   (set (pc)
+       (if_then_else (match_operator 1 "bt_comparison_operator"
+                       [(reg:CCZ FLAGS_REG) (const_int 0)])
+                     (match_operand 2)
+                     (pc)))]
+   "peep2_regno_dead_p (3, FLAGS_REG)"
+   [(parallel
+      [(set (reg:CC FLAGS_REG)
+           (compare:CC (match_dup 0) (const_int 1)))
+       (set (match_dup 0)
+           (minus:SWI (match_dup 0) (const_int 1)))])
+    (set (pc)
+        (if_then_else (match_dup 3)
+                      (match_dup 2)
+                      (pc)))]
+{
+  rtx cc = gen_rtx_REG (CCmode, FLAGS_REG);
+  operands[3] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == NE
+                               ? GEU : LTU, VOIDmode, cc, const0_rtx);
+})
+
 (define_insn "*subsi_3_zext"
   [(set (reg FLAGS_REG)
        (compare (match_operand:SI 1 "register_operand" "0")
--- gcc/testsuite/gcc.target/i386/pr93002.c.jj  2019-12-19 13:49:43.885341492 
+0100
+++ gcc/testsuite/gcc.target/i386/pr93002.c     2019-12-19 13:50:46.465361213 
+0100
@@ -0,0 +1,22 @@
+/* PR target/93002 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "cmp\[^\n\r]*-1" } } */
+
+volatile int sink;
+
+void
+foo (void)
+{
+  unsigned i = 1000;
+  while (i--)
+    sink = i;
+}
+
+void
+bar (void)
+{
+  int i = 2000;
+  while (i--)
+    sink = i;
+}

        Jakub