x-post from here: https://marc.info/?t=157678644800005&r=1&w=2
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 6341216d1bc..e6d690b75c0 100644
--- a/gcc/config/mips/mips.c
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 6341216d1bc..e6d690b75c0 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -18627,7 +18627,7 @@ vr4130_align_insns (void)
if (length > 0)
{
/* If the instruction is an asm statement or multi-instruction
- mips.md patern, the length is only an estimate. Insert an
+ mips.md pattern, the length is only an estimate. Insert an
8 byte alignment after it so that the following instructions
can be handled correctly. */
if (NONJUMP_INSN_P (SEQ_BEGIN (insn))
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 0ad4a00739f..049ff93e0d5 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -6287,7 +6287,7 @@ destination and source strings are operands 1
and 2, and both are
the expansion of this pattern should store in operand 0 the address in
which the @code{NUL} terminator was stored in the destination string.
-This patern has also several optional operands that are same as in
+This pattern has also several optional operands that are same as in
@code{setmem}.
@cindex @code{setmem@var{m}} instruction pattern
