We run fwprop before combine, very early even in the case of fwprop1;
and fwprop1 will change memory addressing to what it considers cheaper.
After the "common" change, it now changes the indexed store instruction
in the testcase to be to a constant address. But that is not an
improvement at all: the byte reverse instructions only exist in the
indexed form, so they will not match anymore.
This patch changes the patterns for the byte reverse instructions to
allow plain memory_operand, letting reload fix this up.
Tested on powerpc64-linux {-m32,-m64}, committing to trunk.
Segher
2019-11-28 Segher Boessenkool <seg...@kernel.crashing.org>
PR target/92602
* config/rs6000/rs6000.md (bswap<mode>2_load for HSI): Change the
indexed_or_indirect_operand to be memory_operand.
(bswap<mode>2_store for HSI): Ditto.
(bswapdi2_load): Ditto.
(bswapdi2_store): Ditto.
---
gcc/config/rs6000/rs6000.md | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 876dfe3..0187ba0 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -2510,13 +2510,13 @@ (define_expand "bswap<mode>2"
(define_insn "bswap<mode>2_load"
[(set (match_operand:HSI 0 "gpc_reg_operand" "=r")
- (bswap:HSI (match_operand:HSI 1 "indexed_or_indirect_operand" "Z")))]
+ (bswap:HSI (match_operand:HSI 1 "memory_operand" "Z")))]
""
"l<wd>brx %0,%y1"
[(set_attr "type" "load")])
(define_insn "bswap<mode>2_store"
- [(set (match_operand:HSI 0 "indexed_or_indirect_operand" "=Z")
+ [(set (match_operand:HSI 0 "memory_operand" "=Z")
(bswap:HSI (match_operand:HSI 1 "gpc_reg_operand" "r")))]
""
"st<wd>brx %1,%y0"
@@ -2632,13 +2632,13 @@ (define_expand "bswapdi2"
;; Power7/cell has ldbrx/stdbrx, so use it directly
(define_insn "bswapdi2_load"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
- (bswap:DI (match_operand:DI 1 "indexed_or_indirect_operand" "Z")))]
+ (bswap:DI (match_operand:DI 1 "memory_operand" "Z")))]
"TARGET_POWERPC64 && TARGET_LDBRX"
"ldbrx %0,%y1"
[(set_attr "type" "load")])
(define_insn "bswapdi2_store"
- [(set (match_operand:DI 0 "indexed_or_indirect_operand" "=Z")
+ [(set (match_operand:DI 0 "memory_operand" "=Z")
(bswap:DI (match_operand:DI 1 "gpc_reg_operand" "r")))]
"TARGET_POWERPC64 && TARGET_LDBRX"
"stdbrx %1,%y0"
--
1.8.3.1
