On 11/19/19 9:29 AM, Christophe Lyon wrote:
> On Mon, 18 Nov 2019 at 20:54, Richard Henderson
> <richard.hender...@linaro.org> wrote:
>>
>> On 11/18/19 1:30 PM, Christophe Lyon wrote:
>>> I'm sorry to notice that the last test (asm-flag-6.c) fails to execute
>>> when compiling with -mabi=ilp32. I have less details than for Arm,
>>> because here I'm using the Foundation Model as simulator instead of
>>> Qemu. In addition, I'm using an old version of it, so maybe it's a
>>> simulator bug. Does it work on your side?
>>
>> I don't know how to test ilp32 with qemu. Is there a distribution that uses
>> this mode, and one tests in system mode? We don't have user-only support for
>> ilp32.
>>
>
> Sorry I wasn't clear: I test aarch64-elf with -mabi=ilp32, using newlib.
In the short term, can you please try this testsuite patch?
r~
diff --git a/gcc/testsuite/gcc.target/aarch64/asm-flag-6.c
b/gcc/testsuite/gcc.target/aarch64/asm-flag-6.c
index 963b5a48c70..54d7fbf317d 100644
--- a/gcc/testsuite/gcc.target/aarch64/asm-flag-6.c
+++ b/gcc/testsuite/gcc.target/aarch64/asm-flag-6.c
@@ -1,6 +1,12 @@
/* Executable testcase for 'output flags.' */
/* { dg-do run } */
+#ifdef __LP64__
+#define W ""
+#else
+#define W "w"
+#endif
+
int test_bits (long nzcv)
{
long n, z, c, v;
@@ -16,7 +22,7 @@ int test_cmps (long x, long y)
{
long gt, lt, ge, le;
- __asm__ ("cmp %[x], %[y]"
+ __asm__ ("cmp %"W"[x], %"W"[y]"
: "=@ccgt"(gt), "=@cclt"(lt), "=@ccge"(ge), "=@ccle"(le)
: [x] "r"(x), [y] "r"(y));
@@ -30,7 +36,7 @@ int test_cmpu (unsigned long x, unsigned long y)
{
long gt, lt, ge, le;
- __asm__ ("cmp %[x], %[y]"
+ __asm__ ("cmp %"W"[x], %"W"[y]"
: "=@cchi"(gt), "=@cclo"(lt), "=@cchs"(ge), "=@ccls"(le)
: [x] "r"(x), [y] "r"(y));
