On 11/11/19 4:03 PM, Andreas Krebbel wrote: > On 11.11.19 15:39, Richard Henderson wrote: >> On 11/7/19 12:52 PM, Andreas Krebbel wrote: >>> +; Such patterns get directly emitted by noce_emit_store_flag. >>> +(define_insn_and_split "*cstorecc<mode>_z13" >>> + [(set (match_operand:GPR 0 "register_operand" "=&d") >>> + (match_operator:GPR 1 "s390_comparison" >>> + [(match_operand 2 "cc_reg_operand" "c") >>> + (match_operand 3 "const_int_operand" "")]))] >> >> The clobbered-output seems superfluous, since it can't overlap "c". > I thought it would be "more" correct this way, but it might lead to an extra > reload being emitted - right?
Well, possibly no extra reloads either, since no input will overlap. >> I believe the only valid const_int is 0, fwiw, so perhaps matching any >> const_int is overkill. > We also have CCRAW mode where that value is != 0. Oh wow. That's an interesting way to fold those combinations. >> Does it help Z12 to allow the 3-insn sequence using LOC(G)R? > Prior to z13 we prefer the variant using a conditional branch. Ok, just checking. Thanks, r~
