On Tue, Oct 29, 2019 at 8:57 AM Jakub Jelinek <ja...@redhat.com> wrote:
>
> Hi!
>
> While working on the OpenMP isa patch, I've noticed most of the x86 ISA
> options imply in the help text that it enables MMX, when they do not.
> We now have the mmx in sse2, so to some extent most of the built-in functions
> are enabled with sse2 on 64-bit targets, but we do not enable MMX code
> generation and I think listing MMX in there does more harm than good,
> it is something that should better be explained in the documentation.
But e.g. -msse does enable MMX built-in functions. The fact that these
builtins are implemented using SSE instructions on x86_64 is just an
implementation detail. OTOH, on 32bit targets -msse still enables MMX
buitlins *and* code generation.
So, this test:
--cut here--
typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__));
__m64 test (__m64 __m1, __m64 __m2)
{
return __builtin_ia32_paddd (__m1, __m2);
}
--cut here--
compiles MMX built-in function with -msse option to what the
documentation claims.
Uros.
> Ok for trunk?
>
> 2019-10-29 Jakub Jelinek <ja...@redhat.com>
>
> * config/i386/i386.opt (-msse, -msse2, -msse3, -mssse3, -msse4.1,
> -msse4.2, -msse4, -mavx, -mavx2, -mavx512f, -mavx512pf, -mavx512er,
> -mavx512cd, -mavx512dq, -mavx512bw, -mavx512vl, -mavx512ifma,
> -mavx512vbmi, -mavx5124fmaps, -mavx5124vnniw, -mavx512vpopcntdq,
> -mavx512vbmi2, -mavx512bitalg, -mfma, -msse4a, -mavx512bf16): Don't
> mention MMX among supported builtins or code generation.
>
> --- gcc/config/i386/i386.opt.jj 2019-09-11 21:50:55.000000000 +0200
> +++ gcc/config/i386/i386.opt 2019-10-26 22:12:58.122039453 +0200
> @@ -646,31 +646,31 @@ Support Athlon 3Dnow! built-in functions
>
> msse
> Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save
> -Support MMX and SSE built-in functions and code generation.
> +Support SSE built-in functions and code generation.
>
> msse2
> Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save
> -Support MMX, SSE and SSE2 built-in functions and code generation.
> +Support SSE and SSE2 built-in functions and code generation.
>
> msse3
> Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation.
> +Support SSE, SSE2 and SSE3 built-in functions and code generation.
>
> mssse3
> Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code
> generation.
> +Support SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation.
>
> msse4.1
> Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code
> generation.
> +Support SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code
> generation.
>
> msse4.2
> Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions
> and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and
> code generation.
>
> msse4
> Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions
> and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and
> code generation.
>
> mno-sse4
> Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
> @@ -682,63 +682,63 @@ Target Undocumented Alias(mavx) Warn(%<-
>
> mavx
> Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in
> functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions
> and code generation.
>
> mavx2
> Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in
> functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in
> functions and code generation.
>
> mavx512f
> Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> built-in functions and code generation.
>
> mavx512pf
> Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> and AVX512PF built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and
> AVX512PF built-in functions and code generation.
>
> mavx512er
> Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> and AVX512ER built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and
> AVX512ER built-in functions and code generation.
>
> mavx512cd
> Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> and AVX512CD built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and
> AVX512CD built-in functions and code generation.
>
> mavx512dq
> Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> and AVX512DQ built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and
> AVX512DQ built-in functions and code generation.
>
> mavx512bw
> Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> and AVX512BW built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and
> AVX512BW built-in functions and code generation.
>
> mavx512vl
> Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> and AVX512VL built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and
> AVX512VL built-in functions and code generation.
>
> mavx512ifma
> Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> and AVX512IFMA built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and
> AVX512IFMA built-in functions and code generation.
>
> mavx512vbmi
> Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F
> and AVX512VBMI built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and
> AVX512VBMI built-in functions and code generation.
>
> mavx5124fmaps
> Target Report Mask(ISA_AVX5124FMAPS) Var(ix86_isa_flags2) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX5124FMAPS built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX5124FMAPS built-in functions and code generation.
>
> mavx5124vnniw
> Target Report Mask(ISA_AVX5124VNNIW) Var(ix86_isa_flags2) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX5124VNNIW built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX5124VNNIW built-in functions and code generation.
>
> mavx512vpopcntdq
> Target Report Mask(ISA_AVX512VPOPCNTDQ) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512VPOPCNTDQ built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512VPOPCNTDQ built-in functions and code generation.
>
> mavx512vbmi2
> Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512VBMI2 built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512VBMI2 built-in functions and code generation.
>
> mavx512vnni
> Target Report Mask(ISA_AVX512VNNI) Var(ix86_isa_flags) Save
> @@ -746,7 +746,7 @@ Support AVX512VNNI built-in functions an
>
> mavx512bitalg
> Target Report Mask(ISA_AVX512BITALG) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512BITALG built-in functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512BITALG built-in functions and code generation.
>
> mavx512vp2intersect
> Target Report Mask(ISA_AVX512VP2INTERSECT) Var(ix86_isa_flags2) Save
> @@ -754,11 +754,11 @@ Support AVX512VP2INTERSECT built-in func
>
> mfma
> Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in
> functions and code generation.
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in
> functions and code generation.
>
> msse4a
> Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save
> -Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code
> generation.
> +Support SSE, SSE2, SSE3 and SSE4A built-in functions and code generation.
>
> mfma4
> Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save
> @@ -1105,7 +1105,7 @@ Generate a __return_loc section pointing
>
> mavx512bf16
> Target Report Mask(ISA_AVX512BF16) Var(ix86_isa_flags2) Save
> -Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> +Support SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and
> AVX512BF16 built-in functions and code generation.
>
> menqcmd
>
> Jakub
>
