This is tested by the main SVE ACLE patches, but since it affects
the evpc routines, it seemed worth splitting out.

Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf.
Applied as r277562.

Richard


2019-10-29  Richard Sandiford  <richard.sandif...@arm.com>

gcc/
        * config/aarch64/aarch64-sve.md (@aarch64_sve_rev<PRED_ALL:mode>):
        New pattern.
        * config/aarch64/aarch64.c (aarch64_evpc_rev_global): Handle all
        SVE modes.

Index: gcc/config/aarch64/aarch64-sve.md
===================================================================
--- gcc/config/aarch64/aarch64-sve.md   2019-09-30 17:55:27.399766882 +0100
+++ gcc/config/aarch64/aarch64-sve.md   2019-10-29 08:47:17.800618914 +0000
@@ -111,6 +111,7 @@
 ;; ---- [INT,FP] General permutes
 ;; ---- [INT,FP] Special-purpose unary permutes
 ;; ---- [INT,FP] Special-purpose binary permutes
+;; ---- [PRED] Special-purpose unary permutes
 ;; ---- [PRED] Special-purpose binary permutes
 ;;
 ;; == Conversions
@@ -4750,6 +4751,20 @@ (define_insn "*aarch64_sve_ext<mode>"
 )
 
 ;; -------------------------------------------------------------------------
+;; ---- [PRED] Special-purpose unary permutes
+;; -------------------------------------------------------------------------
+;; Includes:
+;; - REV
+;; -------------------------------------------------------------------------
+
+(define_insn "@aarch64_sve_rev<mode>"
+  [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
+       (unspec:PRED_ALL [(match_operand:PRED_ALL 1 "register_operand" "Upa")]
+                        UNSPEC_REV))]
+  "TARGET_SVE"
+  "rev\t%0.<Vetype>, %1.<Vetype>")
+
+;; -------------------------------------------------------------------------
 ;; ---- [PRED] Special-purpose binary permutes
 ;; -------------------------------------------------------------------------
 ;; Includes:
Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c        2019-10-29 08:45:20.797453125 +0000
+++ gcc/config/aarch64/aarch64.c        2019-10-29 08:47:17.804618882 +0000
@@ -18156,7 +18156,7 @@ aarch64_evpc_rev_global (struct expand_v
 {
   poly_uint64 nelt = d->perm.length ();
 
-  if (!d->one_vector_p || d->vec_flags != VEC_SVE_DATA)
+  if (!d->one_vector_p || d->vec_flags == VEC_ADVSIMD)
     return false;
 
   if (!d->perm.series_p (0, 1, nelt - 1, -1))

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