On 10/11/19 6:01 AM, Mihailo Stojanovic wrote:
> Currently, when a function argument of type double gets loaded into a
> vector register on a 32-bit target, it is firstly reloaded into two
> general purpose registers, and then loaded into a vector register using
> two insert.w instructions.
>
> This patch swaps the two insert.w instructions with one insve.d
> instruction, which operates on 64-bit floating point registers, so the
> value can be reloaded into a FPR. This is done by adding another
> alternative of constraints for msa_insert_<msafmt_f> pattern, which
> covers the case of a floating-point input value.
>
> gcc/ChangeLog:
>
> * config/mips/mips-msa.md (msa_insert_<msaftm_f>): Add an
> alternative which covers the floating-point input value. Also
> forbid the split of insert.d pattern for floating-point values.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/mips/msa-insert-split.c: New test.
THanks. Installed on the trunk.
jeff
