Hi, it turns out the TARGET_MEM_REF causes ICEs in armeb-none-linux-gnueabihf, a big-endian cross compiler. See PR 91615.
All of them are caused by an unaligned TARGET_MEM_REF for which there is no movmisalign optab, as it seems. Fixed by adding extract_bit_field if that happens. Bootstrapped and reg-tested on x86_64-pc-linux-gnu and used an armeb cross compiler to check that each of the mentioned test cases are fixed at -O3 and -Ofast. Is it OK for trunk? Thanks Bernd.
2019-09-04 Bernd Edlinger <bernd.edlin...@hotmail.de> PR middle-end/91615 * expr.c (expand_expr_real_1): Handle misaligned TARGET_MEM_REF without movmisalign optab. Index: gcc/expr.c =================================================================== --- gcc/expr.c (Revision 275342) +++ gcc/expr.c (Arbeitskopie) @@ -10313,7 +10313,6 @@ expand_expr_real_1 (tree exp, rtx target, machine_ { addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); - enum insn_code icode; unsigned int align; op0 = addr_for_mem_ref (exp, as, true); @@ -10325,21 +10324,27 @@ expand_expr_real_1 (tree exp, rtx target, machine_ if (modifier != EXPAND_WRITE && modifier != EXPAND_MEMORY && mode != BLKmode - && align < GET_MODE_ALIGNMENT (mode) - /* If the target does not have special handling for unaligned - loads of mode then it can use regular moves for them. */ - && ((icode = optab_handler (movmisalign_optab, mode)) - != CODE_FOR_nothing)) + && align < GET_MODE_ALIGNMENT (mode)) { - class expand_operand ops[2]; + enum insn_code icode; - /* We've already validated the memory, and we're creating a - new pseudo destination. The predicates really can't fail, - nor can the generator. */ - create_output_operand (&ops[0], NULL_RTX, mode); - create_fixed_operand (&ops[1], temp); - expand_insn (icode, 2, ops); - temp = ops[0].value; + if ((icode = optab_handler (movmisalign_optab, mode)) + != CODE_FOR_nothing) + { + class expand_operand ops[2]; + + /* We've already validated the memory, and we're creating a + new pseudo destination. The predicates really can't fail, + nor can the generator. */ + create_output_operand (&ops[0], NULL_RTX, mode); + create_fixed_operand (&ops[1], temp); + expand_insn (icode, 2, ops); + temp = ops[0].value; + } + else if (targetm.slow_unaligned_access (mode, align)) + temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode), + 0, unsignedp, NULL_RTX, + mode, mode, false, NULL); } return temp; }