gcc-patches-ow...@gcc.gnu.org wrote on 22/11/2011 03:31:22 PM:
> From: Ramana Radhakrishnan <ramana.radhakrish...@linaro.org>
> > gcc/testsuite/lib/
> > * target-supports.exp (check_effective_target_vect_intfloat_cvt):
True
> > for ARM NEON.
> > (check_effective_target_vect_uintfloat_cvt): Likewise.
> > (check_effective_target_vect_intfloat_cvt): Likewise.
> > (check_effective_target_vect_floatuint_cvt): Likewise.
> > (check_effective_target_vect_floatint_cvt): Likewise.
> > (check_effective_target_vect_extract_even_odd): Likewise.
>
> I'm not sure about enabling the vect_extract_even_odd case. If this
> assumes the presence of an extract-even-odd from registers type
> operation, then the Neon port doesn't really support vec_extract_even
> / vec_extract_odd forms - You do have them in one single instruction
> if you tried to load them from / or store them to memory which is the
> vld2 / vst2 instruction while the register form of vuzp which reads
> and writes to both source operands is not really supported directly
> from the backend.
Right.
Dmitry, you can do this instead:
Index: fast-math-pr35982.c
===================================================================
--- fast-math-pr35982.c (revision 181150)
+++ fast-math-pr35982.c (working copy)
@@ -20,7 +20,7 @@
return avg;
}
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1
"vect" { target vect_extract_even_odd } } } */
-/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail
vect_extract_even_odd } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1
"vect" { target { vect_extract_even_odd || vect_strided2 } } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail
{ vect_extract_even_odd || vect_strided2 } } } } */
/* { dg-final { cleanup-tree-dump "vect" } } */
Ira
>
> The other testsuite changes look OK to me.
>
> cheers
> Ramana
>
> >
>
