To get the ball rolling for other targets, and to let port maintainers see how
easy it really is, here's a first cut at a port to ARM.
Only cross-compiled as yet, and qemu-linux-user isn't good enough to emulate.
I'll do another build on the armv7 host once my current bootstrap and test for
the atomic optabs is complete.
Please review, especially the local setjmp-alike implementation.
r~
commit 09969bb6f3597ccb9fd176bb7dc10119cac91371
Author: Richard Henderson <r...@redhat.com>
Date: Wed Nov 23 15:31:33 2011 -0800
arm-linux: Add libitm support.
diff --git a/libitm/config/arm/sjlj.S b/libitm/config/arm/sjlj.S
new file mode 100644
index 0000000..f1e7769
--- /dev/null
+++ b/libitm/config/arm/sjlj.S
@@ -0,0 +1,48 @@
+/* Copyright (C) 2011 Free Software Foundation, Inc.
+ Contributed by Richard Henderson <r...@redhat.com>.
+
+ This file is part of the GNU Transactional Memory Library (libitm).
+
+ Libitm is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+ .text
+ .align 2
+ .global _ITM_beginTransaction
+ .type _ITM_beginTransaction, %function
+
+_ITM_beginTransaction:
+ push { r4-r11, sp, lr }
+ mov r1, sp
+ bl GTM_begin_transaction
+ add sp, sp, #(9*4)
+ pop { pc }
+ .size _ITM_beginTransaction, . - _ITM_beginTransaction
+
+ .global GTM_longjmp
+ .hidden GTM_longjmp
+ .type GTM_longjmp, %function
+
+GTM_longjmp:
+ ldm r0, { r4-r11, sp, pc }
+ .size GTM_longjmp, . - GTM_longjmp
+
+#ifdef __linux__
+.section .note.GNU-stack, "", %progbits
+#endif
diff --git a/libitm/config/arm/target.h b/libitm/config/arm/target.h
new file mode 100644
index 0000000..d889bc8
--- /dev/null
+++ b/libitm/config/arm/target.h
@@ -0,0 +1,60 @@
+/* Copyright (C) 2011 Free Software Foundation, Inc.
+ Contributed by Richard Henderson <r...@redhat.com>.
+
+ This file is part of the GNU Transactional Memory Library (libitm).
+
+ Libitm is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+namespace GTM HIDDEN {
+
+typedef struct gtm_jmpbuf
+{
+ unsigned long s[8]; /* r4-r12 */
+ void *cfa;
+ unsigned long pc;
+} gtm_jmpbuf;
+
+/* ARM generally uses a fixed page size of 4K. */
+#define PAGE_SIZE 4096
+#define FIXED_PAGE_SIZE 1
+
+/* ??? The size of one line in hardware caches (in bytes). */
+#define HW_CACHELINE_SIZE 64
+
+static inline void
+cpu_relax (void)
+{
+ /* ??? Maybe use WFE. */
+ __asm volatile ("" : : : "memory");
+}
+
+static inline void
+atomic_read_barrier (void)
+{
+ __sync_synchronize ();
+}
+
+static inline void
+atomic_write_barrier (void)
+{
+ __sync_synchronize ();
+}
+
+} // namespace GTM
diff --git a/libitm/config/linux/arm/futex_bits.h
b/libitm/config/linux/arm/futex_bits.h
new file mode 100644
index 0000000..7e1b52f
--- /dev/null
+++ b/libitm/config/linux/arm/futex_bits.h
@@ -0,0 +1,48 @@
+/* Copyright (C) 2011 Free Software Foundation, Inc.
+ Contributed by Richard Henderson <r...@redhat.com>.
+
+ This file is part of the GNU Transactional Memory Library (libitm).
+
+ Libitm is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Provide target-specific access to the futex system call. */
+
+#include <sys/syscall.h>
+
+static inline long
+sys_futex0 (int *addr, long op, long val)
+{
+ register long sc_0 __asm__("r0");
+ register long sc_1 __asm__("r1");
+ register long sc_2 __asm__("r2");
+ register long sc_3 __asm__("r3");
+
+ sc_0 = (long) addr;
+ sc_1 = op;
+ sc_2 = val;
+ sc_3 = 0;
+
+ __asm volatile ("swi %1"
+ : "+r"(sc_0)
+ : "i"(SYS_futex), "r"(sc_1), "r"(sc_2), "r"(sc_3)
+ : "memory");
+
+ return sc_0;
+}
diff --git a/libitm/configure.tgt b/libitm/configure.tgt
index eac6f50..a17f3fc 100644
--- a/libitm/configure.tgt
+++ b/libitm/configure.tgt
@@ -48,6 +48,8 @@ fi
case "${target_cpu}" in
alpha*) ARCH=alpha ;;
+ arm*) ARCH=arm ;;
+
i[3456]86)
case " ${CC} ${CFLAGS} " in
*" -m64 "*)
