After some discussion, we've decided to rename the +bitperm feature
flag to +sve2-bitperm, so that it's consistent with the other SVE2
feature flags. The associated macro was already
__ARM_FEATURE_SVE2_BITPERM, so only the feature flag itself
needs to change.
Tested on aarch64-linux-gnu and applied as r273600.
Richard
2019-07-19 Richard Sandiford <richard.sandif...@arm.com>
gcc/
* doc/invoke.texi: Rename the AArch64 +bitperm extension flag
to +sve-bitperm.
* config/aarch64/aarch64-option-extensions.def: Likewise.
------------------------------------------------------------------------------
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi 2019-07-16 09:11:05.077427347 +0100
+++ gcc/doc/invoke.texi 2019-07-19 12:22:30.128041121 +0100
@@ -16083,7 +16083,7 @@ not affect code generation. This option
@item sve2
Enable the Armv8-a Scalable Vector Extension 2. This also enables SVE
instructions.
-@item bitperm
+@item sve2-bitperm
Enable SVE2 bitperm instructions. This also enables SVE2 instructions.
@item sve2-sm4
Enable SVE2 sm4 instructions. This also enables SVE2 instructions.
Index: gcc/config/aarch64/aarch64-option-extensions.def
===================================================================
--- gcc/config/aarch64/aarch64-option-extensions.def 2019-05-29
10:49:36.240711500 +0100
+++ gcc/config/aarch64/aarch64-option-extensions.def 2019-07-19
12:22:30.124041152 +0100
@@ -58,13 +58,13 @@
/* Enabling "fp" just enables "fp".
Disabling "fp" also disables "simd", "crypto", "fp16", "aes", "sha2",
"sha3", sm3/sm4, "sve", "sve2", "sve2-aes", "sve2-sha3", "sve2-sm4", and
- "bitperm". */
+ "sve2-bitperm". */
AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, 0, AARCH64_FL_SIMD |
AARCH64_FL_CRYPTO | AARCH64_FL_F16 | AARCH64_FL_AES | AARCH64_FL_SHA2 |
AARCH64_FL_SHA3 | AARCH64_FL_SM4 | AARCH64_FL_SVE | AARCH64_FL_SVE2 |
AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4 |
AARCH64_FL_SVE2_BITPERM, false, "fp")
/* Enabling "simd" also enables "fp".
Disabling "simd" also disables "crypto", "dotprod", "aes", "sha2", "sha3",
- "sm3/sm4", "sve", "sve2", "sve2-aes", "sve2-sha3", "sve2-sm4", and
"bitperm".
- */
+ "sm3/sm4", "sve", "sve2", "sve2-aes", "sve2-sha3", "sve2-sm4", and
+ "sve2-bitperm". */
AARCH64_OPT_EXTENSION("simd", AARCH64_FL_SIMD, AARCH64_FL_FP,
AARCH64_FL_CRYPTO | AARCH64_FL_DOTPROD | AARCH64_FL_AES | AARCH64_FL_SHA2 |
AARCH64_FL_SHA3 | AARCH64_FL_SM4 | AARCH64_FL_SVE | AARCH64_FL_SVE2 |
AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4 |
AARCH64_FL_SVE2_BITPERM, false, "asimd")
/* Enabling "crypto" also enables "fp", "simd", "aes" and "sha2".
@@ -80,7 +80,7 @@ AARCH64_OPT_EXTENSION("lse", AARCH64_FL_
/* Enabling "fp16" also enables "fp".
Disabling "fp16" disables "fp16", "fp16fml", "sve", "sve2", "sve2-aes",
- "sve2-sha3", "sve2-sm4", and "bitperm". */
+ "sve2-sha3", "sve2-sm4", and "sve2-bitperm". */
AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, AARCH64_FL_F16FML
| AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3
| AARCH64_FL_SVE2_SM4 | AARCH64_FL_SVE2_BITPERM, false, "fphp asimdhp")
/* Enabling or disabling "rcpc" only changes "rcpc". */
@@ -116,7 +116,7 @@ AARCH64_OPT_EXTENSION("fp16fml", AARCH64
/* Enabling "sve" also enables "fp16", "fp" and "simd".
Disabling "sve" disables "sve", "sve2", "sve2-aes", "sve2-sha3", "sve2-sm4"
- and "bitperm". */
+ and "sve2-bitperm". */
AARCH64_OPT_EXTENSION("sve", AARCH64_FL_SVE, AARCH64_FL_FP | AARCH64_FL_SIMD |
AARCH64_FL_F16, AARCH64_FL_SVE2 | AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3 |
AARCH64_FL_SVE2_SM4 | AARCH64_FL_SVE2_BITPERM, false, "sve")
/* Enabling/Disabling "profile" does not enable/disable any other feature. */
@@ -139,7 +139,7 @@ AARCH64_OPT_EXTENSION("predres", AARCH64
/* Enabling "sve2" also enables "sve", "fp16", "fp", and "simd".
Disabling "sve2" disables "sve2", "sve2-aes", "sve2-sha3", "sve2-sm4", and
- "bitperm". */
+ "sve2-bitperm". */
AARCH64_OPT_EXTENSION("sve2", AARCH64_FL_SVE2, AARCH64_FL_SVE | AARCH64_FL_FP
| AARCH64_FL_SIMD | AARCH64_FL_F16, AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3
| AARCH64_FL_SVE2_SM4 | AARCH64_FL_SVE2_BITPERM, false, "")
/* Enabling "sve2-sm4" also enables "sm4", "simd", "fp16", "fp", "sve", and
@@ -154,8 +154,8 @@ AARCH64_OPT_EXTENSION("sve2-aes", AARCH6
"sve2". Disabling "sve2-sha3" just disables "sve2-sha3". */
AARCH64_OPT_EXTENSION("sve2-sha3", AARCH64_FL_SVE2_SHA3, AARCH64_FL_SHA3 |
AARCH64_FL_SIMD | AARCH64_FL_F16 | AARCH64_FL_FP | AARCH64_FL_SVE |
AARCH64_FL_SVE2, 0, false, "")
-/* Enabling "bitperm" also enables "simd", "fp16", "fp", "sve", and "sve2".
- Disabling "bitperm" just disables "bitperm". */
-AARCH64_OPT_EXTENSION("bitperm", AARCH64_FL_SVE2_BITPERM, AARCH64_FL_SIMD |
AARCH64_FL_F16 | AARCH64_FL_FP | AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "")
+/* Enabling "sve2-bitperm" also enables "simd", "fp16", "fp", "sve", and
+ "sve2". Disabling "sve2-bitperm" just disables "sve2-bitperm". */
+AARCH64_OPT_EXTENSION("sve2-bitperm", AARCH64_FL_SVE2_BITPERM, AARCH64_FL_SIMD
| AARCH64_FL_F16 | AARCH64_FL_FP | AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false,
"")
#undef AARCH64_OPT_EXTENSION
