Now that TARGET_MMX_WITH_SSE is implemented, the compiler should be
able to auto-vectorize:

void
foo (char *restrict r, char *restrict a)
{
  for (int i = 0; i < 8; i++)
    r[i] += a[i];
}

Attached patch enables the conversion and produces:

foo:
        movq    (%rdi), %xmm1
        movq    (%rsi), %xmm0
        paddb   %xmm1, %xmm0
        movq    %xmm0, (%rdi)
        ret

Please note that the patch regresses

FAIL: gcc.target/i386/sse2-vect-simd-11.c scan-tree-dump-times vect
"vectorized [1-3] loops" 2
FAIL: gcc.target/i386/sse2-vect-simd-15.c scan-tree-dump-times vect
"vectorized [1-3] loops" 2

For some reason, the compiler decides to vectorize with 8-byte
vectors, resulting in:

missed:   not vectorized: relevant stmt not supported: _8 = (short
unsigned int) _4;
missed:  bad operation or unsupported loop bound.
missed: couldn't vectorize loop

However, the unpatched compiler is able to vectorize loop using
16-byte vectors. It looks that the compiler should re-run
vectorization with wider vectors, if vectorization with narrower
vectors fails. Jakub, Richard, do you have any insight in this issue?

2019-06-26  Uroš Bizjak  <ubiz...@gmail.com>

        * config/i386/i386.c (ix86_autovectorize_vector_sizes):
        Autovectorize 8-byte vectors for TARGET_MMX_WITH_SSE.

testsuite/ChangeLog:

2019-06-26  Uroš Bizjak  <ubiz...@gmail.com>

        * lib/target-supports.exp (available_vector_sizes)
        <[istarget i?86-*-*] || [istarget x86_64-*-*]>: Add
        64-bit vectors for !ia32.

The patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Uros.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1ca1712183dc..24bd0896f137 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -21401,6 +21401,9 @@ ix86_autovectorize_vector_sizes (vector_sizes *sizes, 
bool all)
       sizes->safe_push (16);
       sizes->safe_push (32);
     }
+
+  if (TARGET_MMX_WITH_SSE)
+    sizes->safe_push (8);
 }
 
 /* Implemenation of targetm.vectorize.get_mask_mode.  */
diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index 1d4aaa2a87ec..285c32f8cebb 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -6603,9 +6603,14 @@ proc available_vector_sizes { } {
     } elseif { [istarget arm*-*-*]
                && [check_effective_target_arm_neon_ok] } {
        lappend result 128 64
-    } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*])
-                && ([check_avx_available] && ![check_prefer_avx128])) } {
-       lappend result 256 128
+    } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
+       if { [check_avx_available] && ![check_prefer_avx128] } {
+           lappend result 256
+       }
+       lappend result 128
+       if { ![is-effective-target ia32] } {
+           lappend result 64
+       }
     } elseif { [istarget sparc*-*-*] } {
        lappend result 64
     } else {

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