On 15/05/2019 03:39, kugan.vivekanandara...@linaro.org wrote:
> From: Kugan Vivekanandarajah <kugan.vivekanandara...@linaro.org>
>
The subject line to this email is not helpful. Why should I be
interested in reviewing this patch? Also, why does it claim to be 2/2
when there's no 1/2 to go with it?
Please include with all patches a justification giving background to why
you believe the patch is correct. All patches need this sort of
description - don't assume that the reviewer is familiar with the code
or will just accept your word for it.
R.
> gcc/ChangeLog:
>
> 2019-05-15 Kugan Vivekanandarajah <kugan.vivekanandara...@linaro.org>
>
> PR target/88834
> * config/aarch64/aarch64.c (aarch64_classify_address): Relax
> allow_reg_index_p.
>
> gcc/testsuite/ChangeLog:
>
> 2019-05-15 Kugan Vivekanandarajah <kugan.vivekanandara...@linaro.org>
>
> PR target/88834
> * gcc.target/aarch64/pr88834.c: New test.
> * gcc.target/aarch64/sve/struct_vect_1.c: Adjust.
> * gcc.target/aarch64/sve/struct_vect_14.c: Likewise.
> * gcc.target/aarch64/sve/struct_vect_15.c: Likewise.
> * gcc.target/aarch64/sve/struct_vect_16.c: Likewise.
> * gcc.target/aarch64/sve/struct_vect_17.c: Likewise.
> * gcc.target/aarch64/sve/struct_vect_7.c: Likewise.
>
> Change-Id: I840d08dc89a845b3913204228bae1bed40601d07
> ---
> gcc/config/aarch64/aarch64.c | 2 +-
> gcc/testsuite/gcc.target/aarch64/pr88834.c | 15 +++++++++++++++
> gcc/testsuite/gcc.target/aarch64/sve/struct_vect_1.c | 8 ++++----
> gcc/testsuite/gcc.target/aarch64/sve/struct_vect_14.c | 8 ++++----
> gcc/testsuite/gcc.target/aarch64/sve/struct_vect_15.c | 8 ++++----
> gcc/testsuite/gcc.target/aarch64/sve/struct_vect_16.c | 8 ++++----
> gcc/testsuite/gcc.target/aarch64/sve/struct_vect_17.c | 8 ++++----
> gcc/testsuite/gcc.target/aarch64/sve/struct_vect_7.c | 8 ++++----
> 8 files changed, 40 insertions(+), 25 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/aarch64/pr88834.c
>
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index 1f90467..34292eb 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -6592,7 +6592,7 @@ aarch64_classify_address (struct aarch64_address_info
> *info,
> bool allow_reg_index_p = (!load_store_pair_p
> && (known_lt (GET_MODE_SIZE (mode), 16)
> || vec_flags == VEC_ADVSIMD
> - || vec_flags == VEC_SVE_DATA));
> + || vec_flags & VEC_SVE_DATA));
>
> /* For SVE, only accept [Rn], [Rn, Rm, LSL #shift] and
> [Rn, #offset, MUL VL]. */
> diff --git a/gcc/testsuite/gcc.target/aarch64/pr88834.c
> b/gcc/testsuite/gcc.target/aarch64/pr88834.c
> new file mode 100644
> index 0000000..ea00967
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/pr88834.c
> @@ -0,0 +1,15 @@
> +/* { dg-do compile } */
> +/* { dg-options "-S -O3 -march=armv8.2-a+sve" } */
> +
> +void
> +f (int *restrict x, int *restrict y, int *restrict z, int n)
> +{
> + for (int i = 0; i < n; i += 2)
> + {
> + x[i] = y[i] + z[i];
> + x[i + 1] = y[i + 1] - z[i + 1];
> + }
> +}
> +
> +/* { dg-final { scan-assembler-times {\tld2w\t{z[0-9]+.s - z[0-9]+.s},
> p[0-7]/z, \[x[0-9]+, x[0-9]+, lsl 2\]\n} 2 } } */
> +/* { dg-final { scan-assembler-times {\tst2w\t{z[0-9]+.s - z[0-9]+.s},
> p[0-7], \[x[0-9]+, x[0-9]+, lsl 2\]\n} 1 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_1.c
> index 6e3c889..918a581 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_1.c
> @@ -83,9 +83,9 @@ NAME(g4) (TYPE *__restrict a, TYPE *__restrict b, TYPE
> *__restrict c,
> }
> }
>
> -/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+\]\n} } } */
> +/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+, x[0-9]+\]\n} } } */
> /* { dg-final { scan-assembler {\tld3b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+\]\n} } } */
> -/* { dg-final { scan-assembler {\tld4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+\]\n} } } */
> -/* { dg-final { scan-assembler {\tst2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+\]\n} } } */
> +/* { dg-final { scan-assembler {\tld4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+, x[0-9]+\]\n} } } */
> +/* { dg-final { scan-assembler {\tst2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+, x[0-9]+\]\n} } } */
> /* { dg-final { scan-assembler {\tst3b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+\]\n} } } */
> -/* { dg-final { scan-assembler {\tst4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+\]\n} } } */
> +/* { dg-final { scan-assembler {\tst4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+, x[0-9]+\]\n} } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_14.c
> b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_14.c
> index 45644b6..a16a79e 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_14.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_14.c
> @@ -43,12 +43,12 @@
> #undef NAME
> #undef TYPE
>
> -/* { dg-final { scan-assembler-times {\tld2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tld2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tld3b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tld4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tst2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tld4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tst2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tst3b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tst4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tst4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+, x[0-9]+\]\n} 1 } } */
>
> /* { dg-final { scan-assembler-times {\tld2h\t{z[0-9]+.h - z[0-9]+.h},
> p[0-7]/z, \[x[0-9]+\]\n} 2 } } */
> /* { dg-final { scan-assembler-times {\tld3h\t{z[0-9]+.h - z[0-9]+.h},
> p[0-7]/z, \[x[0-9]+\]\n} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_15.c
> b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_15.c
> index 814dbb3..bc00267 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_15.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_15.c
> @@ -3,12 +3,12 @@
>
> #include "struct_vect_14.c"
>
> -/* { dg-final { scan-assembler-times {\tld2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tld2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tld3b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tld4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tst2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tld4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tst2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tst3b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tst4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tst4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+, x[0-9]+\]\n} 1 } } */
>
> /* { dg-final { scan-assembler-times {\tld2h\t{z[0-9]+.h - z[0-9]+.h},
> p[0-7]/z, \[x[0-9]+\]\n} 2 } } */
> /* { dg-final { scan-assembler-times {\tld3h\t{z[0-9]+.h - z[0-9]+.h},
> p[0-7]/z, \[x[0-9]+\]\n} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_16.c
> b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_16.c
> index 6ecf89b..9e2a549 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_16.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_16.c
> @@ -3,12 +3,12 @@
>
> #include "struct_vect_14.c"
>
> -/* { dg-final { scan-assembler-times {\tld2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tld2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tld3b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tld4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tst2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tld4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tst2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tst3b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tst4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tst4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+, x[0-9]+\]\n} 1 } } */
>
> /* { dg-final { scan-assembler-times {\tld2h\t{z[0-9]+.h - z[0-9]+.h},
> p[0-7]/z, \[x[0-9]+\]\n} 2 } } */
> /* { dg-final { scan-assembler-times {\tld3h\t{z[0-9]+.h - z[0-9]+.h},
> p[0-7]/z, \[x[0-9]+\]\n} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_17.c
> b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_17.c
> index 571c6d0..e791e2e 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_17.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_17.c
> @@ -3,12 +3,12 @@
>
> #include "struct_vect_14.c"
>
> -/* { dg-final { scan-assembler-times {\tld2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tld2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tld3b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tld4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tst2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tld4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7]/z, \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tst2b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+, x[0-9]+\]\n} 1 } } */
> /* { dg-final { scan-assembler-times {\tst3b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> -/* { dg-final { scan-assembler-times {\tst4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+\]\n} 1 } } */
> +/* { dg-final { scan-assembler-times {\tst4b\t{z[0-9]+.b - z[0-9]+.b},
> p[0-7], \[x[0-9]+, x[0-9]+\]\n} 1 } } */
>
> /* { dg-final { scan-assembler-times {\tld2h\t{z[0-9]+.h - z[0-9]+.h},
> p[0-7]/z, \[x[0-9]+\]\n} 2 } } */
> /* { dg-final { scan-assembler-times {\tld3h\t{z[0-9]+.h - z[0-9]+.h},
> p[0-7]/z, \[x[0-9]+\]\n} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_7.c
> b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_7.c
> index b741901..3d3070e 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_7.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/struct_vect_7.c
> @@ -78,9 +78,9 @@ g4 (TYPE *__restrict a, TYPE *__restrict b, TYPE
> *__restrict c,
> }
> }
>
> -/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+\]\n} } } */
> +/* { dg-final { scan-assembler {\tld2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+, x[0-9]+\]\n} } } */
> /* { dg-final { scan-assembler {\tld3b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+\]\n} } } */
> -/* { dg-final { scan-assembler {\tld4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+\]\n} } } */
> -/* { dg-final { scan-assembler {\tst2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+\]\n} } } */
> +/* { dg-final { scan-assembler {\tld4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z,
> \[x[0-9]+, x[0-9]+\]\n} } } */
> +/* { dg-final { scan-assembler {\tst2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+, x[0-9]+\]\n} } } */
> /* { dg-final { scan-assembler {\tst3b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+\]\n} } } */
> -/* { dg-final { scan-assembler {\tst4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+\]\n} } } */
> +/* { dg-final { scan-assembler {\tst4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7],
> \[x[0-9]+, x[0-9]+\]\n} } } */
>
