Hi,

I'm applying this patch on Andrey's behalf to resolve PR 87273 where an
overly strict assert fires; Andrey explanation in PR comment #5 provides
more detail.

Alexander

2019-04-01  Andrey Belevantsev  <a...@ispras.ru>

        PR rtl-optimization/87273
        * sel-sched-ir.c (merge_fences): Remove assert.

        * gcc.dg/pr87273.c: New test.

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 2f76e56ca8e..6dec1beaa04 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -703,11 +703,6 @@ merge_fences (fence_t f, insn_t insn,
       else
         if (candidate->src == BLOCK_FOR_INSN (last_scheduled_insn))
           {
-            /* Would be weird if same insn is successor of several fallthrough
-               edges.  */
-            gcc_assert (BLOCK_FOR_INSN (insn)->prev_bb
-                        != BLOCK_FOR_INSN (last_scheduled_insn_old));
-
             state_free (FENCE_STATE (f));
             FENCE_STATE (f) = state;

diff --git a/gcc/testsuite/gcc.dg/pr87273.c b/gcc/testsuite/gcc.dg/pr87273.c
new file mode 100644
index 00000000000..43662f0241c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr87273.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-options "-Os -fschedule-insns -fsel-sched-pipelining 
-fselective-scheduling -fno-ssa-phiopt -fno-tree-loop-im" } */
+/* { dg-additional-options "-march=core2" { target i?86-*-* x86_64-*-* } } */
+
+int sd;
+
+void
+w5 (int n4)
+{
+  long int *vq = (long int *) &n4;
+
+  while (n4 < 1)
+    {
+      int ks;
+
+      ks = !!(n4 + 1) ? ((++sd) == *vq) : 0;
+      if (ks == 1 / *vq)
+        *vq *= sd;
+    }
+}

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