On Fri, Mar 1, 2019 at 4:44 AM Richard Biener
<richard.guent...@gmail.com> wrote:
>
> On Fri, Mar 1, 2019 at 7:54 AM bin.cheng <bin.ch...@linux.alibaba.com> wrote:
> >
> > Hi,
> > This patch fixes PR89487 by following comments in PR. It simply avoid
> > checking runtime
> > alias by versioning in loop distribution if address of register variable
> > may need to be taken.
> >
> > One thing I am not sure is if we should avoid generating data reference in
> > the first place:
> > Creating dr for pc
> > analyze_innermost: success.
> > base_address: &pc
> > offset from base address: 0
> > constant offset from base address: 0
> > step: 0
> > base alignment: 8
> > base misalignment: 0
> > offset alignment: 128
> > step alignment: 128
> > base_object: pc
> > Here 'pc' is the register variable.
>
> Hm, I think the DR is ok-ish, we are generating DRs dependent on
> storage-order as well.
>
> > Bootstrap and test on x86_64, any comment?
>
> Patch is OK.
>
> Thanks,
> Richard.
>
> > Thanks,
> > bin
> > 2019-02-28 Bin Cheng <bin.ch...@linux.alibaba.com>
> >
> > PR tree-optimization/89487
> > * tree-loop-distribution.c (has_nonaddressable_dataref_p): New.
> > (create_rdg_vertices): Compute has_nonaddressable_dataref_p.
> > (distribute_loop): Don't do runtime alias check if there is non-
> > addressable data reference.
> > * tree-ssa-loop-ivopts.c (may_be_nonaddressable_p): Check if
> > VAR_DECL
> > is a register variable.
> >
> > 2018-02-28 Bin Cheng <bin.ch...@linux.alibaba.com>
> >
> > PR tree-optimization/89487
> > * gcc/testsuite/gcc.dg/tree-ssa/pr89487.c: New test.
gcc.dg/tree-ssa/pr89487.c:
/* { dg-do compile } */
/* { dg-options "-O2 -ftree-loop-distribution" } */
void
caml_interprete (void)
{
register int *pc asm("%r15"); <<<< These are valid only for x86-64.
register int *sp asm("%r14");
int i;
for (i = 0; i < 3; ++i)
*--sp = pc[i];
}
--
H.J.
