On 2/16/19, H.J. Lu <hjl.to...@gmail.com> wrote:
> The second and third alternatives in *vec_extractv2si_zext_mem don't
> require MMX. But the second one requires SSE2.
>
> * config/i386/mmx.md (*vec_extractv2si_zext_mem): Doesn't require
> MMX. Add isa attribute.
OK.
Thanks,
Uros.
> ---
> gcc/config/i386/mmx.md | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
> index c1e0f2c411e..b566cc80020 100644
> --- a/gcc/config/i386/mmx.md
> +++ b/gcc/config/i386/mmx.md
> @@ -1354,13 +1354,14 @@
> (vec_select:SI
> (match_operand:V2SI 1 "memory_operand" "o,o,o")
> (parallel [(match_operand:SI 2 "const_0_to_1_operand")]))))]
> - "TARGET_64BIT && TARGET_MMX"
> + "TARGET_64BIT"
> "#"
> "&& reload_completed"
> [(set (match_dup 0) (zero_extend:DI (match_dup 1)))]
> {
> operands[1] = adjust_address (operands[1], SImode, INTVAL (operands[2]) *
> 4);
> -})
> +}
> + [(set_attr "isa" "*,sse2,*")])
>
> (define_expand "vec_extractv2sisi"
> [(match_operand:SI 0 "register_operand")
> --
> 2.20.1
>
>
