On Mon, Feb 11, 2019 at 10:32:23AM +0000, Kyrill Tkachov wrote: > I think this is ok.
Ok, committed the simpler version. > The "q" constraint was introduced after the iwmmxt.md patterns were written > and it seems > that they were just never updated to use it. > It's hard for anyone to get a hold of the relevant hardware to test iwmmxt > these days, > so I suspect that path hasn't been thoroughly tested. > In my opinion the ldrd/strd-related logic there should follow the same > approach as the rest of > the arm backend, that is, using 'q'. > > A patch to update the iwmmxt.md constraints in that way is pre-approved. Thinking about it some more, given that the "q" constraint has been introduced exactly for the ldrdstrd.md created movdi patterns (https://gcc.gnu.org/ml/gcc-patches/2013-02/msg00604.html), we don't generate those anymore, and r13 aka sp is a FIXED_REGISTERS, I wonder if instead of that we shouldn't change *arm_movdi and *movdi_vfp patterns (what about *movdf_soft_insn ?) to use r constraint again - the RA shouldn't be putting DImode regs at ip, because only half of that register is non-fixed and previously the only way to get there was ldrdstrd peephole2s, but those use *arm_ldrd/*arm_strd patterns now. So like the patch below (though, I have only limited possibilities to test this, can throw it in armv7hl-linux-gnueabi distro build). 2019-02-11 Jakub Jelinek <ja...@redhat.com> PR bootstrap/88714 * config/arm/arm.md (*arm_movdi, *movdf_soft_insn): Use "r" instead of "q" constraint. * config/arm/vfp.md (*movdi_vfp): Likewise. * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use "r" instead of "q" constraint for operands[1]. --- gcc/config/arm/arm.md.jj 2019-01-31 00:26:04.417738975 +0100 +++ gcc/config/arm/arm.md 2019-02-11 12:02:32.778707056 +0100 @@ -5817,8 +5817,8 @@ (define_expand "movdi" ) (define_insn "*arm_movdi" - [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, q, m") - (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,q"))] + [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m") + (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))] "TARGET_32BIT && !(TARGET_HARD_FLOAT) && !TARGET_IWMMXT @@ -7102,8 +7102,8 @@ (define_expand "reload_outdf" ) (define_insn "*movdf_soft_insn" - [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,q,m") - (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,q"))] + [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,r,m") + (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,r"))] "TARGET_32BIT && TARGET_SOFT_FLOAT && ( register_operand (operands[0], DFmode) || register_operand (operands[1], DFmode))" --- gcc/config/arm/vfp.md.jj 2019-01-31 00:26:04.312740661 +0100 +++ gcc/config/arm/vfp.md 2019-02-11 12:03:13.232045976 +0100 @@ -307,8 +307,8 @@ (define_insn "*thumb2_movsi_vfp" ;; DImode moves (define_insn "*movdi_vfp" - [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,q,q,m,w,!r,w,w, Uv") - (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,q,r,w,w,UvTu,w"))] + [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w, Uv") + (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,UvTu,w"))] "TARGET_32BIT && TARGET_HARD_FLOAT && ( register_operand (operands[0], DImode) || register_operand (operands[1], DImode)) --- gcc/config/arm/ldrdstrd.md.jj 2019-02-11 11:39:39.977125795 +0100 +++ gcc/config/arm/ldrdstrd.md 2019-02-11 12:03:57.978314745 +0100 @@ -159,7 +159,7 @@ (define_peephole2 ; swap the destination (define_insn "*arm_ldrd" [(parallel [(set (match_operand:SI 0 "s_register_operand" "=q") (match_operand:SI 2 "memory_operand" "m")) - (set (match_operand:SI 1 "s_register_operand" "=q") + (set (match_operand:SI 1 "s_register_operand" "=r") (match_operand:SI 3 "memory_operand" "m"))])] "TARGET_LDRD && TARGET_ARM && reload_completed && valid_operands_ldrd_strd (operands, true)" @@ -180,7 +180,7 @@ (define_insn "*arm_strd" [(parallel [(set (match_operand:SI 2 "memory_operand" "=m") (match_operand:SI 0 "s_register_operand" "q")) (set (match_operand:SI 3 "memory_operand" "=m") - (match_operand:SI 1 "s_register_operand" "q"))])] + (match_operand:SI 1 "s_register_operand" "r"))])] "TARGET_LDRD && TARGET_ARM && reload_completed && valid_operands_ldrd_strd (operands, false)" { Jakub