On x86-64, since __m64 is returned and passed in XMM registers, we can
implement MMX intrinsics with SSE instructions. To support it, we disable
MMX by default in 64-bit mode so that MMX registers won't be available
with x86-64. Most of MMX instructions have equivalent SSE versions and
results of some SSE versions need to be reshuffled to the right order
for MMX. Thee are couple tricky cases:
1. MMX maskmovq and SSE2 maskmovdqu aren't equivalent. We emulate MMX
maskmovq with SSE2 maskmovdqu by zeroing out the upper 64 bits of the
mask operand. A warning is issued since invalid memory access may
happen when bits 64:127 at memory location are unmapped:
xmmintrin.h:1168:3: note: Emulate MMX maskmovq with SSE2 maskmovdqu may result i
n invalid memory access
1168 | __builtin_ia32_maskmovq ((__v8qi)__A, (__v8qi)__N, __P);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2. MMX movntq is emulated with SSE2 DImode movnti, which is available
in 64-bit mode.
3. MMX pshufb takes a 3-bit index while SSE pshufb takes a 4-bit index.
SSE emulation must clear the bit 4 in the shuffle control mask.
4. To emulate MMX cvtpi2p with SSE2 cvtdq2ps, we must properly preserve
the upper 64 bits of destination XMM register.
Tests are also added to check each SSE emulation of MMX intrinsics.
With MMX disabled in 64-bit mode, 8-byte vectorizer is enabled with SSE2.
There are no regressions on i686 and x86-64. For x86-64, GCC is also
tested with
--with-arch=native --with-cpu=native
on AVX2 and AVX512F machines.
H.J. Lu (46):
i386: Add TARGET_MMX_INSNS and TARGET_MMX_WITH_SSE
libitm: Support _ITM_TYPE_M64 with SSE2 in 64-bit mode
i386: Allow 64-bit vector modes in SSE registers
i386: Allow UNSPECV_EMMS with SSE2 in 64-bit mode
i386: Emulate MMX packsswb/packssdw/packuswb with SSE2
i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX
i386: Emulate MMX plusminus/sat_plusminus with SSE
i386: Emulate MMX mulv4hi3 with SSE
i386: Emulate MMX smulv4hi3_highpart with SSE
i386: Emulate MMX mmx_pmaddwd with SSE
i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE
i386: Emulate MMX <any_logic><mode>3 with SSE
i386: Emulate MMX mmx_andnot<mode>3 with SSE
i386: Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE
i386: Emulate MMX vec_dupv2si with SSE
i386: Emulate MMX pshufw with SSE
i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE
i386: Emulate MMX sse_cvtpi2ps with SSE
i386: Emulate MMX mmx_pextrw with SSE
i386: Emulate MMX mmx_pinsrw with SSE
i386: Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE
i386: Emulate MMX mmx_pmovmskb with SSE
i386: Emulate MMX mmx_umulv4hi3_highpart with SSE
i386: Emulate MMX maskmovq with SSE2 maskmovdqu
i386: Emulate MMX mmx_uavgv8qi3 with SSE
i386: Emulate MMX mmx_uavgv4hi3 with SSE
i386: Emulate MMX mmx_psadbw with SSE
i386: Emulate MMX movntq with SSE2 movntidi
i386: Emulate MMX umulv1siv1di3 with SSE2
i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE
i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE
i386: Emulate MMX ssse3_pmaddubsw with SSE
i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE
i386: Emulate MMX pshufb with SSE version
i386: Emulate MMX ssse3_psign<mode>3 with SSE
i386: Emulate MMX ssse3_palignrdi with SSE
i386: Emulate MMX abs<mode>2 with SSE
i386: Allow MMXMODE moves without MMX
i386: Allow MMX vector expanders with SSE
i386: Don't enable MMX in 64-bit mode by default
i386: Add tests for MMX intrinsic emulations with SSE
i386: Also enable SSSE3 __m64 tests without MMX
i386: Enable 8-byte vectorizer for TARGET_MMX_WITH_SSE
i386: Implement V2SF add/sub/mul with SEE
i386: Implement V2SF <-> V2SI conversions with SEE
i386: Implement V2SF comparisons with SSE
gcc/config/i386/constraints.md | 10 +
gcc/config/i386/driver-i386.c | 4 +-
gcc/config/i386/i386-builtin.def | 126 +--
gcc/config/i386/i386-protos.h | 4 +
gcc/config/i386/i386.c | 205 ++++-
gcc/config/i386/i386.h | 22 +-
gcc/config/i386/i386.md | 3 +-
gcc/config/i386/i386.opt | 4 +
gcc/config/i386/mmintrin.h | 10 +-
gcc/config/i386/mmx.md | 824 ++++++++++++------
gcc/config/i386/sse.md | 412 +++++++--
gcc/testsuite/gcc.dg/tree-ssa/pr84512.c | 2 +-
gcc/testsuite/gcc.target/i386/mmx-vals.h | 77 ++
gcc/testsuite/gcc.target/i386/pr82483-1.c | 2 +-
gcc/testsuite/gcc.target/i386/pr82483-2.c | 2 +-
gcc/testsuite/gcc.target/i386/pr89028-1.c | 10 +
gcc/testsuite/gcc.target/i386/pr89028-10.c | 39 +
gcc/testsuite/gcc.target/i386/pr89028-11.c | 39 +
gcc/testsuite/gcc.target/i386/pr89028-12.c | 39 +
gcc/testsuite/gcc.target/i386/pr89028-13.c | 39 +
gcc/testsuite/gcc.target/i386/pr89028-2.c | 11 +
gcc/testsuite/gcc.target/i386/pr89028-3.c | 14 +
gcc/testsuite/gcc.target/i386/pr89028-4.c | 14 +
gcc/testsuite/gcc.target/i386/pr89028-5.c | 11 +
gcc/testsuite/gcc.target/i386/pr89028-6.c | 14 +
gcc/testsuite/gcc.target/i386/pr89028-7.c | 14 +
gcc/testsuite/gcc.target/i386/pr89028-8.c | 12 +
gcc/testsuite/gcc.target/i386/pr89028-9.c | 12 +
gcc/testsuite/gcc.target/i386/sse-mmx-1.c | 12 +
gcc/testsuite/gcc.target/i386/sse2-mmx-10.c | 43 +
gcc/testsuite/gcc.target/i386/sse2-mmx-11.c | 40 +
gcc/testsuite/gcc.target/i386/sse2-mmx-12.c | 42 +
gcc/testsuite/gcc.target/i386/sse2-mmx-13.c | 41 +
gcc/testsuite/gcc.target/i386/sse2-mmx-14.c | 31 +
gcc/testsuite/gcc.target/i386/sse2-mmx-15.c | 36 +
gcc/testsuite/gcc.target/i386/sse2-mmx-16.c | 40 +
gcc/testsuite/gcc.target/i386/sse2-mmx-17.c | 51 ++
gcc/testsuite/gcc.target/i386/sse2-mmx-18.c | 13 +
gcc/testsuite/gcc.target/i386/sse2-mmx-19.c | 11 +
gcc/testsuite/gcc.target/i386/sse2-mmx-2.c | 12 +
gcc/testsuite/gcc.target/i386/sse2-mmx-20.c | 11 +
gcc/testsuite/gcc.target/i386/sse2-mmx-21.c | 13 +
gcc/testsuite/gcc.target/i386/sse2-mmx-3.c | 12 +
gcc/testsuite/gcc.target/i386/sse2-mmx-4.c | 4 +
gcc/testsuite/gcc.target/i386/sse2-mmx-5.c | 12 +
gcc/testsuite/gcc.target/i386/sse2-mmx-6.c | 12 +
gcc/testsuite/gcc.target/i386/sse2-mmx-7.c | 12 +
gcc/testsuite/gcc.target/i386/sse2-mmx-8.c | 4 +
gcc/testsuite/gcc.target/i386/sse2-mmx-9.c | 80 ++
.../gcc.target/i386/sse2-mmx-cvtpi2ps.c | 43 +
.../gcc.target/i386/sse2-mmx-cvtps2pi.c | 36 +
.../gcc.target/i386/sse2-mmx-cvttps2pi.c | 36 +
.../gcc.target/i386/sse2-mmx-maskmovq.c | 52 ++
.../gcc.target/i386/sse2-mmx-packssdw.c | 52 ++
.../gcc.target/i386/sse2-mmx-packsswb.c | 52 ++
.../gcc.target/i386/sse2-mmx-packuswb.c | 52 ++
.../gcc.target/i386/sse2-mmx-paddb.c | 48 +
.../gcc.target/i386/sse2-mmx-paddd.c | 48 +
.../gcc.target/i386/sse2-mmx-paddq.c | 43 +
.../gcc.target/i386/sse2-mmx-paddsb.c | 48 +
.../gcc.target/i386/sse2-mmx-paddsw.c | 48 +
.../gcc.target/i386/sse2-mmx-paddusb.c | 48 +
.../gcc.target/i386/sse2-mmx-paddusw.c | 48 +
.../gcc.target/i386/sse2-mmx-paddw.c | 48 +
gcc/testsuite/gcc.target/i386/sse2-mmx-pand.c | 44 +
.../gcc.target/i386/sse2-mmx-pandn.c | 44 +
.../gcc.target/i386/sse2-mmx-pavgb.c | 52 ++
.../gcc.target/i386/sse2-mmx-pavgw.c | 52 ++
.../gcc.target/i386/sse2-mmx-pcmpeqb.c | 48 +
.../gcc.target/i386/sse2-mmx-pcmpeqd.c | 48 +
.../gcc.target/i386/sse2-mmx-pcmpeqw.c | 48 +
.../gcc.target/i386/sse2-mmx-pcmpgtb.c | 48 +
.../gcc.target/i386/sse2-mmx-pcmpgtd.c | 48 +
.../gcc.target/i386/sse2-mmx-pcmpgtw.c | 48 +
.../gcc.target/i386/sse2-mmx-pextrw.c | 59 ++
.../gcc.target/i386/sse2-mmx-pinsrw.c | 61 ++
.../gcc.target/i386/sse2-mmx-pmaddwd.c | 47 +
.../gcc.target/i386/sse2-mmx-pmaxsw.c | 48 +
.../gcc.target/i386/sse2-mmx-pmaxub.c | 48 +
.../gcc.target/i386/sse2-mmx-pminsw.c | 48 +
.../gcc.target/i386/sse2-mmx-pminub.c | 48 +
.../gcc.target/i386/sse2-mmx-pmovmskb.c | 46 +
.../gcc.target/i386/sse2-mmx-pmulhuw.c | 51 ++
.../gcc.target/i386/sse2-mmx-pmulhw.c | 53 ++
.../gcc.target/i386/sse2-mmx-pmullw.c | 52 ++
.../gcc.target/i386/sse2-mmx-pmuludq.c | 47 +
gcc/testsuite/gcc.target/i386/sse2-mmx-por.c | 44 +
.../gcc.target/i386/sse2-mmx-psadbw.c | 58 ++
.../gcc.target/i386/sse2-mmx-pshufw.c | 248 ++++++
.../gcc.target/i386/sse2-mmx-pslld.c | 52 ++
.../gcc.target/i386/sse2-mmx-pslldi.c | 153 ++++
.../gcc.target/i386/sse2-mmx-psllq.c | 47 +
.../gcc.target/i386/sse2-mmx-psllqi.c | 245 ++++++
.../gcc.target/i386/sse2-mmx-psllw.c | 52 ++
.../gcc.target/i386/sse2-mmx-psllwi.c | 105 +++
.../gcc.target/i386/sse2-mmx-psrad.c | 52 ++
.../gcc.target/i386/sse2-mmx-psradi.c | 153 ++++
.../gcc.target/i386/sse2-mmx-psraw.c | 52 ++
.../gcc.target/i386/sse2-mmx-psrawi.c | 105 +++
.../gcc.target/i386/sse2-mmx-psrld.c | 52 ++
.../gcc.target/i386/sse2-mmx-psrldi.c | 153 ++++
.../gcc.target/i386/sse2-mmx-psrlq.c | 47 +
.../gcc.target/i386/sse2-mmx-psrlqi.c | 245 ++++++
.../gcc.target/i386/sse2-mmx-psrlw.c | 52 ++
.../gcc.target/i386/sse2-mmx-psrlwi.c | 105 +++
.../gcc.target/i386/sse2-mmx-psubb.c | 48 +
.../gcc.target/i386/sse2-mmx-psubd.c | 48 +
.../gcc.target/i386/sse2-mmx-psubq.c | 43 +
.../gcc.target/i386/sse2-mmx-psubusb.c | 48 +
.../gcc.target/i386/sse2-mmx-psubusw.c | 48 +
.../gcc.target/i386/sse2-mmx-psubw.c | 48 +
.../gcc.target/i386/sse2-mmx-punpckhbw.c | 53 ++
.../gcc.target/i386/sse2-mmx-punpckhdq.c | 47 +
.../gcc.target/i386/sse2-mmx-punpckhwd.c | 49 ++
.../gcc.target/i386/sse2-mmx-punpcklbw.c | 53 ++
.../gcc.target/i386/sse2-mmx-punpckldq.c | 47 +
.../gcc.target/i386/sse2-mmx-punpcklwd.c | 49 ++
gcc/testsuite/gcc.target/i386/sse2-mmx-pxor.c | 44 +
gcc/testsuite/gcc.target/i386/ssse3-pabsb.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-pabsd.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-pabsw.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-palignr.c | 6 +-
gcc/testsuite/gcc.target/i386/ssse3-phaddd.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-phaddsw.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-phaddw.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-phsubd.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-phsubsw.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-phsubw.c | 4 +-
.../gcc.target/i386/ssse3-pmaddubsw.c | 4 +-
.../gcc.target/i386/ssse3-pmulhrsw.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-pshufb.c | 6 +-
gcc/testsuite/gcc.target/i386/ssse3-psignb.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-psignd.c | 4 +-
gcc/testsuite/gcc.target/i386/ssse3-psignw.c | 4 +-
.../objc.dg/gnu-encoding/struct-layout-1.h | 2 +-
libitm/libitm.h | 2 +-
136 files changed, 6575 insertions(+), 439 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/mmx-vals.h
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-10.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-11.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-12.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-13.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-3.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-4.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-5.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-6.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-7.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-8.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89028-9.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse-mmx-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-10.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-11.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-12.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-13.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-14.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-15.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-16.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-17.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-18.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-19.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-20.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-21.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-3.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-4.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-5.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-6.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-7.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-8.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-9.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-cvtpi2ps.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-cvtps2pi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-cvttps2pi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-maskmovq.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-packssdw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-packsswb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-packuswb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-paddb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-paddd.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-paddq.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-paddsb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-paddsw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-paddusb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-paddusw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-paddw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pand.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pandn.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pavgb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pavgw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pcmpeqb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pcmpeqd.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pcmpeqw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pcmpgtb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pcmpgtd.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pcmpgtw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pextrw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pinsrw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pmaddwd.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pmaxsw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pmaxub.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pminsw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pminub.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pmovmskb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pmulhuw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pmulhw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pmullw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pmuludq.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-por.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psadbw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pshufw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pslld.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pslldi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psllq.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psllqi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psllw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psllwi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psrad.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psradi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psraw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psrawi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psrld.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psrldi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psrlq.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psrlqi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psrlw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psrlwi.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psubb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psubd.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psubq.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psubusb.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psubusw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-psubw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-punpckhbw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-punpckhdq.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-punpckhwd.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-punpcklbw.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-punpckldq.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-punpcklwd.c
create mode 100644 gcc/testsuite/gcc.target/i386/sse2-mmx-pxor.c
--
2.20.1
