On 24/01/2019 15:36, Wilco Dijkstra wrote:
> The TST instruction no longer matches in all cases due to changes in
> Combine.  The fix is simple, we now need to allow a subreg as well when
> selecting the cc_mode.  This fixes the tst_5.c and tst_6.c failures.
> 
> AArch64 regress & bootstrap OK.
> 
> ChangeLog:
> 2019-01-23  Wilco Dijkstra  <wdijk...@arm.com>
> 
>       PR rtl-optimization/87763
>       * config/aarch64/aarch64.c (aarch64_select_cc_mode):
>       Allow SUBREG when matching CC_NZmode compare.
> 
> --
> 
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index 
> a0006dc1f8a921dd83209d4404132a1fe3cfcd1e..237428d28b4f20ddfefee83ed020e209011147a0
>  100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -7120,7 +7120,7 @@ aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
>  
>    /* Equality comparisons of short modes against zero can be performed
>       using the TST instruction with the appropriate bitmask.  */
> -  if (y == const0_rtx && REG_P (x)
> +  if (y == const0_rtx && (REG_P (x) || SUBREG_P (x))
>        && (code == EQ || code == NE)
>        && (GET_MODE (x) == HImode || GET_MODE (x) == QImode))
>      return CC_NZmode;
> 

OK.

R.

Reply via email to