Hi All,
This patch adds the documentation for Stack clash protection and Armv8.3-a
support to
changes.html for GCC 9.
I have validated the html using the W3C validator.
Ok for cvs?
Thanks,
Tamar
--
Index: htdocs/gcc-9/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
retrieving revision 1.35
diff -u -r1.35 changes.html
--- htdocs/gcc-9/changes.html 15 Jan 2019 13:17:49 -0000 1.35
+++ htdocs/gcc-9/changes.html 22 Jan 2019 11:16:07 -0000
@@ -214,6 +214,27 @@
<code>-mtune=cortex-a76.cortex-a55</code> or as arguments to the equivalent target
attributes and pragmas.
</li>
+ <li>
+ The AArch64 port now has support for stack clash protection using the
+ <code>-fstack-clash-protection</code> option. The protection also works for
+ SVE systems. The probing interval/guard size can be set by using
+ <code>--param stack-clash-protection-guard-size=12|16</code>.
+ The value of this parameter must be in bytes represented as a power of two.
+ The only two supported values for this parameter are 12 and 16 being
+ 4Kb (2^12) and 64Kb (2^16) respectively.
+
+ The default value is 16 (64Kb) and can be changed at configure
+ time using the flag <code>--with-stack-clash-protection-guard-size=12|16</code>.
+ </li>
+ <li>
+ The Armv8.3-A complex number instructions are now supported via intrinsics
+ when the option <code>-march=armv8.3-a</code> or equivalent is specified.
+ For the half-precision floating-point variants of these instructions use the
+ architecture extension flag <code>+fp16</code>, e.g.
+ <code>-march=armv8.3-a+fp16</code>.
+
+ The intrinsics are defined by the ACLE specification.
+ </li>
</ul>
<h3 id="arc">ARC</h3>
@@ -250,6 +271,15 @@
(which have no known implementations) has been removed.
Note that Armv5T, Armv5TE and Armv5TEJ architectures remain supported.
</li>
+ <li>
+ The Armv8.3-A complex number instructions are now supported via intrinsics
+ when the option <code>-march=armv8.3-a</code> or equivalent is specified.
+ For the half-precision floating-point variants of these instructions use the
+ architecture extension flag <code>+fp16</code>, e.g.
+ <code>-march=armv8.3-a+fp16</code>.
+
+ The intrinsics are defined by the ACLE specification.
+ </li>
</ul>
<!-- <h3 id="avr">AVR</h3> -->
