Ping.
> -----Original Message----- > From: gcc-patches-ow...@gcc.gnu.org <gcc-patches-ow...@gcc.gnu.org> > On Behalf Of Tamar Christina > Sent: Sunday, November 11, 2018 10:28 > To: gcc-patches@gcc.gnu.org > Cc: nd <n...@arm.com>; Ramana Radhakrishnan > <ramana.radhakrish...@arm.com>; Richard Earnshaw > <richard.earns...@arm.com>; ni...@redhat.com; Kyrylo Tkachov > <kyrylo.tkac...@arm.com> > Subject: [PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values > > Hi All, > > The AArch32 backend is currently not able to support autovectorization of > half-float values on ARM. This is because we never told the vectorizer what > the vector modes are for Half floats. > > This enables autovectorization by definiting V4HF and V8HF as the vector > modes. > > Bootstrap and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf and > x86_64-pc-linux-gnu are still on going but previous patch showed no > regressions. > > Ok for trunk? > > Thanks, > Tamar > > gcc/ChangeLog: > > 2018-11-11 Tamar Christina <tamar.christ...@arm.com> > > * config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and > V8HF. > > --
