The following patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88457
The patch was successfully bootstrapped and tested on x86-64 and ppc64. Committed as rev. 267307
Index: ChangeLog =================================================================== --- ChangeLog (revision 267306) +++ ChangeLog (working copy) @@ -1,3 +1,8 @@ +2018-12-20 Vladimir Makarov <vmaka...@redhat.com> + + PR target/88457 + * ira-color.c (fast_allocation): Choose the best cost hard reg. + 2018-12-20 Richard Sandiford <richard.sandif...@arm.com> * config/aarch64/iterators.md (SVE_INT_UNARY, fp_int_op): Add abs. Index: ira-color.c =================================================================== --- ira-color.c (revision 267245) +++ ira-color.c (working copy) @@ -4852,7 +4852,8 @@ color (void) static void fast_allocation (void) { - int i, j, k, num, class_size, hard_regno; + int i, j, k, num, class_size, hard_regno, best_hard_regno, cost, min_cost; + int *costs; #ifdef STACK_REGS bool no_stack_reg_p; #endif @@ -4903,6 +4904,9 @@ fast_allocation (void) no_stack_reg_p = ALLOCNO_NO_STACK_REG_P (a); #endif class_size = ira_class_hard_regs_num[aclass]; + costs = ALLOCNO_HARD_REG_COSTS (a); + min_cost = INT_MAX; + best_hard_regno = -1; for (j = 0; j < class_size; j++) { hard_regno = ira_class_hard_regs[aclass][j]; @@ -4915,16 +4919,28 @@ fast_allocation (void) || (TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs[aclass][mode], hard_regno))) continue; - ALLOCNO_HARD_REGNO (a) = hard_regno; - for (l = 0; l < nr; l++) + if (costs == NULL) { - ira_object_t obj = ALLOCNO_OBJECT (a, l); - for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next) - for (k = r->start; k <= r->finish; k++) - IOR_HARD_REG_SET (used_hard_regs[k], - ira_reg_mode_hard_regset[hard_regno][mode]); + best_hard_regno = hard_regno; + break; } - break; + cost = costs[j]; + if (min_cost > cost) + { + min_cost = cost; + best_hard_regno = hard_regno; + } + } + if (best_hard_regno < 0) + continue; + ALLOCNO_HARD_REGNO (a) = hard_regno = best_hard_regno; + for (l = 0; l < nr; l++) + { + ira_object_t obj = ALLOCNO_OBJECT (a, l); + for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next) + for (k = r->start; k <= r->finish; k++) + IOR_HARD_REG_SET (used_hard_regs[k], + ira_reg_mode_hard_regset[hard_regno][mode]); } } ira_free (sorted_allocnos); Index: testsuite/ChangeLog =================================================================== --- testsuite/ChangeLog (revision 267306) +++ testsuite/ChangeLog (working copy) @@ -1,3 +1,8 @@ +2018-12-20 Vladimir Makarov <vmaka...@redhat.com> + + PR target/88457 + * gcc.target/powerpc/pr88457.c: New. + 2018-12-20 Jakub Jelinek <ja...@redhat.com> PR c++/88180 Index: testsuite/gcc.target/powerpc/pr88457.c =================================================================== --- testsuite/gcc.target/powerpc/pr88457.c (revision 0) +++ testsuite/gcc.target/powerpc/pr88457.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile { target { powerpc64*-*-* } } } */ +/* { dg-options "-m32 -mcpu=power7 -O1 -fexpensive-optimizations --param ira-max-conflict-table-size=0 --param max-cse-insns=3 -c -mcpu=e300c3" } */ + +__attribute__((target_clones("cpu=power9,default"))) +long mod_func (long a, long b) +{ + return a % b; +} + +long mod_func_or (long a, long b, long c) +{ + return mod_func (a, b) | c; +}