[patch] Fix PR rtl-optimization/87727

[Eric Botcazou]

Hi,

this is a regression introduced on the SPARC by the somewhat controversial 
combiner change for hard registers: the compiler can no longer apply the leaf 
registers optimization to a small function so a register window is now used.

The combiner change might be an overall win, but my understanding is that it's 
dependent on the target and SPARC seems to be in the wrong basket: almost all 
changes to the gcc.c-torture/compile testsuite at -O2 are pessimizations in 
the form of additional move instructions between registers on function entry.

Clearly that's counter-productive for a LEAF_REGISTERS target like SPARC so 
the proposed fix is to re-enable hard register combining for leaf registers.

Tested on SPARC/Solaris 11, OK for the mainline?


2018-12-20  Eric Botcazou  <ebotca...@adacore.com>

        PR rtl-optimization/87727
        * combine.c (cant_combine_insn_p): On a LEAF_REGISTERS target, combine
        again moves from leaf hard registers.

-- 
Eric Botcazou
Index: combine.c
===================================================================
--- combine.c	(revision 267029)
+++ combine.c	(working copy)
@@ -2349,7 +2349,12 @@ cant_combine_insn_p (rtx_insn *insn)
     dest = SUBREG_REG (dest);
   if (REG_P (src) && REG_P (dest)
       && ((HARD_REGISTER_P (src)
-	   && ! TEST_HARD_REG_BIT (fixed_reg_set, REGNO (src)))
+	   && ! TEST_HARD_REG_BIT (fixed_reg_set, REGNO (src))
+#ifdef LEAF_REGISTERS
+	   && ! LEAF_REGISTERS [REGNO (src)])
+#else
+	   )
+#endif
 	  || (HARD_REGISTER_P (dest)
 	      && ! TEST_HARD_REG_BIT (fixed_reg_set, REGNO (dest))
 	      && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (dest))))))