Generate LDRD/STRD in ARM mode with -O2 for CPUs that set "prefer_ldrd_strd" tune flag.
The patch consists of
* peephole2 patterns that merge LDR/STR into DImode move to match the
existing arm_movdi defne_insn,
* peephole2 patterns that attempt to rename and reorder registers to enable
LDRD/STRD, and
* a change in output_move_double that enabled generation of LDRD/STRD with
ip.
* replace "r" constraints with "q" constraints in patterns for movdi, in
alternatives that emit LDRD/STRD via a call to output_move_double.
gcc/ChangeLog
2011-10-28 Greta Yorsh <greta.yo...@arm.com>
* config/arm/ldrdstrd0.md: New peepholes for ARM mode.
* config/arm/arm.c (output_move_double): enable LDRD/STRD
with IP register.
* config/arm/arm.md (arm_movdi, movdf_soft_insn): replace
constraint "r" with "q" for output_move_double alternatives
to generate LDRD/STRD with ip.
* config/arm/vfp.md (movdi_vfp, movdi_vfp_cortexa8): Likewise.
* config/arm/iwmmxt.md (iwmmxt_arm_movdi): Likewise.
* config/arm/fpa.md (movdf_fpa): Likewise.
* config/arm/cirrus.md (cirrus_arm_movdi): Likewise.
2-output-double.patch
Description: Binary data
