The patch I committed today recently for
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88207
creates a new regression for pr34256.c. 2 moves is expected but gcc
with the patch generates 3 moves. I think now RA generates the right code.
We have the following code before RA
(insn 7 6 13 2 (set (reg:V2SI 88)
(plus:V2SI (reg:V2SI 89 [ x ])
(mem/c:V2SI (symbol_ref:DI ("y") [flags 0x2] <var_decl
0x7faad08b5b40 y>) [1 y+0 S8 A64])))"mmintrin.h":306:18 1115 {*mmx_addv2si3}
(expr_list:REG_DEAD (reg:V2SI 89 [ x ])
(nil)))
(insn 13 7 14 2 (set (reg/i:DI 0 ax)
(subreg:DI (reg:V2SI 88) 0)) "pr34256.c":11:1 66 {*movdi_internal}
(expr_list:REG_DEAD (reg:V2SI 88)
The test is expected to assign mmx reg to pseudo 88 but gcc with the
patch assigns memory to it. The cost of mmx to general reg move is 13,
while overall cost of mmx to mem and mem to general moves is 10. So IRA
now chooses memory for pseudo 88 according to the minimal cost.
Now, if we want still assign mmx reg to the pseudo 88, we should change
the costs in machine-dependent x86 code. But I think it might create
other unexpected code generation. As mmx is basically not used nowadays
the test is not important, I just propose the following patch.
Is it ok for the trunk?
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog (revision 266582)
+++ testsuite/ChangeLog (working copy)
@@ -1,3 +1,7 @@
+2018-11-28 Vladimir Makarov <vmaka...@redhat.com>
+
+ * gcc.target/i386/pr34256.c: Adjust the number of expected moves.
+
2018-11-28 Marek Polacek <pola...@redhat.com>
PR c++/88222 - ICE with bit-field with invalid type.
Index: testsuite/gcc.target/i386/pr34256.c
===================================================================
--- testsuite/gcc.target/i386/pr34256.c (revision 266155)
+++ testsuite/gcc.target/i386/pr34256.c (working copy)
@@ -10,5 +10,5 @@ unsigned long long foo(__m64 m) {
return _mm_cvtm64_si64(_mm_add_pi32(x, y));
}
-/* { dg-final { scan-assembler-times "mov" 2 { target { nonpic || pie_enabled } } } } */
-/* { dg-final { scan-assembler-times "mov" 4 { target { { ! nonpic } && { ! pie_enabled } } } } } */
+/* { dg-final { scan-assembler-times "mov" 3 { target { nonpic || pie_enabled } } } } */
+/* { dg-final { scan-assembler-times "mov" 5 { target { { ! nonpic } && { ! pie_enabled } } } } } */