Hi all,
In the AAarch64 ISA the MUL and MNEG instructions are actually aliases of MADD
and MSUB.
Therefore they should have the type attribute mla, rather than mul, which
should only be used
for AArch32 32-bit multiplication instructions.
This will ensure more consistent scheduling decisions.
Bootstrapped and tested on aarch64-none-linux-gnu.
Ok for trunk?
Thanks,
Kyrill
2018-11-26 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/aarch64/aarch64.md (mul<mode>3): Change type to mla.
(*mulsi3_uxtw): Likewise.
(*mul<mode>_neg): Likewise.
(*mulsi_neg_uxtw): Likewise.
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index a3ccbbe791f94ff08d114af81e2b870919242458..73559b52ac24c58a8e23a297eac6d9a58b37b8fe 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3385,7 +3385,7 @@ (define_insn "mul<mode>3"
(match_operand:GPI 2 "register_operand" "r")))]
""
"mul\\t%<w>0, %<w>1, %<w>2"
- [(set_attr "type" "mul")]
+ [(set_attr "type" "mla")]
)
;; zero_extend version of above
@@ -3396,7 +3396,7 @@ (define_insn "*mulsi3_uxtw"
(match_operand:SI 2 "register_operand" "r"))))]
""
"mul\\t%w0, %w1, %w2"
- [(set_attr "type" "mul")]
+ [(set_attr "type" "mla")]
)
(define_insn "madd<mode>"
@@ -3452,7 +3452,7 @@ (define_insn "*mul<mode>_neg"
""
"mneg\\t%<w>0, %<w>1, %<w>2"
- [(set_attr "type" "mul")]
+ [(set_attr "type" "mla")]
)
;; zero_extend version of above
@@ -3464,7 +3464,7 @@ (define_insn "*mulsi_neg_uxtw"
""
"mneg\\t%w0, %w1, %w2"
- [(set_attr "type" "mul")]
+ [(set_attr "type" "mla")]
)
(define_insn "<su_optab>mulsidi3"
