On 11/24/18 12:34 AM, Andi Kleen wrote:
> Uros Bizjak <ubiz...@gmail.com> writes:
>
>> On Thu, Nov 22, 2018 at 12:48 PM Martin Liška <mli...@suse.cz> wrote:
>>>
>>> On 11/22/18 8:07 AM, Wei Xiao wrote:
>>>> Jakub,
>>>>
>>>> Thanks for the comments!
>>>> I have addressed them as attached.
>>>
>>> Hi.
>>>
>>> Can you please add the new march into:
>>>
>>> - gcc/doc/extend.texi:20530
>>> - gcc/testsuite/gcc.target/i386/builtin_target.c - test it here
>>
>> IIRC, family and model numbers are not yet known for latest processors.
>
> For Cascade Lake the model number is the same as Skylake Server,
> it can only be distinguished based on the stepping (5 vs 4)
Very interesting, probably the first time a distinguish is based on stepping
number?
>
> Like gcc -mcpu=native needs to learn about this.
>
> -Andi
>
I'm attaching patch that does that. Note that it's completely untested as I
don't have
access to any of the new machines (Skylake server).
Martin
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index e910038d11d..860a3105fa8 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -393,7 +393,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int max_level, ext_level;
unsigned int vendor;
- unsigned int model, family;
+ unsigned int stepping, model, family;
unsigned int has_sse3, has_ssse3, has_cmpxchg16b;
unsigned int has_cmpxchg8b, has_cmov, has_mmx, has_sse, has_sse2;
@@ -447,6 +447,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
__cpuid (1, eax, ebx, ecx, edx);
+ stepping = eax & 0x0f;
model = (eax >> 4) & 0x0f;
family = (eax >> 8) & 0x0f;
if (vendor == signature_INTEL_ebx
@@ -832,8 +833,16 @@ const char *host_detect_local_cpu (int argc, const char **argv)
cpu = "skylake";
break;
case 0x55:
- /* Skylake with AVX-512. */
- cpu = "skylake-avx512";
+ if (stepping == 4)
+ {
+ /* Skylake with AVX-512. */
+ cpu = "skylake-avx512";
+ }
+ else
+ {
+ /* Cascade Lake with AVX512. */
+ cpu = "cascadelake";
+ }
break;
case 0x57:
/* Knights Landing. */
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ef585333448..53e456a0a2e 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -32283,6 +32283,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_INTEL_COREI7_CANNONLAKE,
M_INTEL_COREI7_ICELAKE_CLIENT,
M_INTEL_COREI7_ICELAKE_SERVER,
+ M_INTEL_COREI7_CASCADELAKE,
M_AMDFAM17H_ZNVER2
};
@@ -32310,6 +32311,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"cannonlake", M_INTEL_COREI7_CANNONLAKE},
{"icelake-client", M_INTEL_COREI7_ICELAKE_CLIENT},
{"icelake-server", M_INTEL_COREI7_ICELAKE_SERVER},
+ {"cascadelake", M_INTEL_COREI7_CASCADELAKE},
{"bonnell", M_INTEL_BONNELL},
{"silvermont", M_INTEL_SILVERMONT},
{"goldmont", M_INTEL_GOLDMONT},
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 91baec3c886..6fb3b687b01 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -20536,6 +20536,9 @@ Intel Core i7 Ice Lake Client CPU.
@item icelake-server
Intel Core i7 Ice Lake Server CPU.
+@item cascadelake
+Intel Core i7 Cascade Lake CPU.
+
@item bonnell
Intel Atom Bonnell CPU.
diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c b/gcc/testsuite/gcc.target/i386/builtin_target.c
index 1a7a9f3124f..c0901d2379e 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -12,7 +12,7 @@
/* Check if the Intel CPU model and sub-model are identified. */
static void
check_intel_cpu_model (unsigned int family, unsigned int model,
- unsigned int brand_id)
+ unsigned int stepping, unsigned int brand_id)
{
/* Parse family and model only if brand ID is 0. */
if (brand_id == 0)
@@ -108,9 +108,17 @@ check_intel_cpu_model (unsigned int family, unsigned int model,
assert (__builtin_cpu_is ("skylake"));
break;
case 0x55:
- /* Skylake with AVX-512 support. */
assert (__builtin_cpu_is ("corei7"));
- assert (__builtin_cpu_is ("skylake-avx512"));
+ if (stepping == 4)
+ {
+ /* Skylake with AVX-512 support. */
+ assert (__builtin_cpu_is ("skylake-avx512"));
+ }
+ else
+ {
+ /* Cascade Lake with AVX-512 support. */
+ assert (__builtin_cpu_is ("cascadelake"));
+ }
break;
case 0x66:
/* Cannon Lake. */
@@ -290,7 +298,7 @@ check_detailed ()
int max_level;
unsigned int vendor;
- unsigned int model, family, brand_id;
+ unsigned int stepping, model, family, brand_id;
unsigned int extended_model, extended_family;
/* Assume cpuid insn present. Run in level 0 to get vendor id. */
@@ -306,6 +314,7 @@ check_detailed ()
if (!__get_cpuid_output (1, &eax, &ebx, &ecx, &edx))
return 0;
+ stepping = eax & 0x0f;
model = (eax >> 4) & 0x0f;
family = (eax >> 8) & 0x0f;
brand_id = ebx & 0xff;
@@ -323,7 +332,7 @@ check_detailed ()
}
else if (family == 0x06)
model += extended_model;
- check_intel_cpu_model (family, model, brand_id);
+ check_intel_cpu_model (family, model, stepping, brand_id);
check_features (ecx, edx, max_level);
}
else if (vendor == signature_AMD_ebx)
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index 09f4d6f154e..ea0dcac7468 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -119,7 +119,8 @@ get_amd_cpu (unsigned int family, unsigned int model)
/* Get the specific type of Intel CPU. */
static void
-get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
+get_intel_cpu (unsigned int family, unsigned int model,
+ unsigned int stepping, unsigned int brand_id)
{
/* Parse family and model only if brand ID is 0. */
if (brand_id == 0)
@@ -215,9 +216,17 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
__cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE;
break;
case 0x55:
- /* Skylake with AVX-512 support. */
__cpu_model.__cpu_type = INTEL_COREI7;
- __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512;
+ if (stepping == 4)
+ {
+ /* Skylake with AVX-512 support. */
+ __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512;
+ }
+ else
+ {
+ /* Cascade Lake with AVX-512 support. */
+ __cpu_model.__cpu_subtype = INTEL_COREI7_CASCADELAKE;
+ }
break;
case 0x66:
/* Cannon Lake. */
@@ -419,7 +428,7 @@ __cpu_indicator_init (void)
int max_level;
unsigned int vendor;
- unsigned int model, family, brand_id;
+ unsigned int stepping, model, family, brand_id;
unsigned int extended_model, extended_family;
/* This function needs to run just once. */
@@ -448,6 +457,7 @@ __cpu_indicator_init (void)
return -1;
}
+ stepping = eax & 0x0f;
model = (eax >> 4) & 0x0f;
family = (eax >> 8) & 0x0f;
brand_id = ebx & 0xff;
@@ -466,7 +476,7 @@ __cpu_indicator_init (void)
model += extended_model;
/* Get CPU type. */
- get_intel_cpu (family, model, brand_id);
+ get_intel_cpu (family, model, stepping, brand_id);
/* Find available features. */
get_available_features (ecx, edx, max_level);
__cpu_model.__cpu_vendor = VENDOR_INTEL;
diff --git a/libgcc/config/i386/cpuinfo.h b/libgcc/config/i386/cpuinfo.h
index ac9c3486028..ef58e5c5133 100644
--- a/libgcc/config/i386/cpuinfo.h
+++ b/libgcc/config/i386/cpuinfo.h
@@ -75,6 +75,7 @@ enum processor_subtypes
INTEL_COREI7_CANNONLAKE,
INTEL_COREI7_ICELAKE_CLIENT,
INTEL_COREI7_ICELAKE_SERVER,
+ INTEL_COREI7_CASCADELAKE,
AMDFAM17H_ZNVER2,
CPU_SUBTYPE_MAX
};
