This patch combines the duties of rs6000_address_for_fpconvert into
rs6000_force_indexed_or_indirect_mem which I recently added, and changes
all calls to use the latter. The new function name is more descriptive of what
is actually going on. This now uses indexed_or_indirect_operand() to test
the incoming rtx which matches what the insns this is used to prepare for
are using as their predicate.
Bootstrap/regtest passes on ppc64le (power7, power9), ok for trunk?
2018-11-01 Aaron Sawdey <acsaw...@linux.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_address_for_fpconvert): Remove
prototype.
* config/rs6000/rs6000.c (rs6000_force_indexed_or_indirect_mem):
Combine with rs6000_address_for_fpconvert.
(rs6000_address_for_fpconvert) Combine with
rs6000_force_indexed_or_indirect_mem.
(rs6000_expand_vector_init): Change function call from
rs6000_address_for_fpconvert to rs6000_force_indexed_or_indirect_mem.
* config/rs6000/rs6000.md (floatsi<mode>2_lfiwax): Change call from
rs6000_address_for_fpconvert to rs6000_force_indexed_or_indirect_mem.
(floatsi<mode>2_lfiwax_mem): Ditto.
(floatunssi<mode>2_lfiwzx): Ditto.
(floatunssi<mode>2_lfiwzx_mem): Ditto.
(float<QHI:mode><FP_ISA3:mode>2): Ditto.
(floatuns<QHI:mode><FP_ISA3:mode>2): Ditto.
(fix_trunc<mode>si2_stfiwx): Ditto.
(fixuns_trunc<mode>si2_stfiwx): Ditto.
(float_<mode>si2_hw): Ditto.
(floatuns_<mode>si2_hw): Ditto.
* config/rs6000/vsx.md (*vsx_extract_si): Ditto.
(vsx_splat_<mode>): Ditto.
Index: gcc/config/rs6000/rs6000-protos.h
===================================================================
--- gcc/config/rs6000/rs6000-protos.h (revision 265637)
+++ gcc/config/rs6000/rs6000-protos.h (working copy)
@@ -153,7 +153,6 @@
extern rtx rs6000_machopic_legitimize_pic_address (rtx, machine_mode,
rtx);
-extern rtx rs6000_address_for_fpconvert (rtx);
extern rtx rs6000_allocate_stack_temp (machine_mode, bool, bool);
extern align_flags rs6000_loop_align (rtx);
extern void rs6000_split_logical (rtx [], enum rtx_code, bool, bool, bool);
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 265637)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -6560,7 +6560,7 @@
{
rtx element0 = XVECEXP (vals, 0, 0);
if (MEM_P (element0))
- element0 = rs6000_address_for_fpconvert (element0);
+ element0 = rs6000_force_indexed_or_indirect_mem (element0);
else
element0 = force_reg (SImode, element0);
@@ -6601,7 +6601,7 @@
if (TARGET_P9_VECTOR)
{
if (MEM_P (element0))
- element0 = rs6000_address_for_fpconvert (element0);
+ element0 = rs6000_force_indexed_or_indirect_mem (element0);
emit_insn (gen_vsx_splat_v4sf (target, element0));
}
@@ -8423,23 +8423,6 @@
return false;
}
-/* Helper function for making sure we will make full
- use of indexed addressing. */
-
-rtx
-rs6000_force_indexed_or_indirect_mem (rtx x)
-{
- machine_mode m = GET_MODE (x);
- if (!indexed_or_indirect_operand (x, m))
- {
- rtx addr = XEXP (x, 0);
- addr = force_reg (Pmode, addr);
- x = replace_equiv_address_nv (x, addr);
- }
- return x;
-}
-
-
/* Implement the TARGET_LEGITIMATE_COMBINED_INSN hook. */
static bool
@@ -37312,21 +37295,19 @@
return stack;
}
-/* Given a memory reference, if it is not a reg or reg+reg addressing, convert
- to such a form to deal with memory reference instructions like STFIWX that
- only take reg+reg addressing. */
+/* Given a memory reference, if it is not a reg or reg+reg addressing,
+ convert to such a form to deal with memory reference instructions
+ like STFIWX and LDBRX that only take reg+reg addressing. */
rtx
-rs6000_address_for_fpconvert (rtx x)
+rs6000_force_indexed_or_indirect_mem (rtx x)
{
- rtx addr;
+ machine_mode m = GET_MODE (x);
gcc_assert (MEM_P (x));
- addr = XEXP (x, 0);
- if (can_create_pseudo_p ()
- && ! legitimate_indirect_address_p (addr, reload_completed)
- && ! legitimate_indexed_address_p (addr, reload_completed))
+ if (can_create_pseudo_p () && !indexed_or_indirect_operand (x, m))
{
+ rtx addr = XEXP (x, 0);
if (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC)
{
rtx reg = XEXP (addr, 0);
@@ -37346,7 +37327,7 @@
addr = reg;
}
- x = replace_equiv_address (x, copy_addr_to_reg (addr));
+ x = replace_equiv_address (x, force_reg (Pmode, addr));
}
return x;
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 265637)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -5225,7 +5225,7 @@
tmp = gen_reg_rtx (DImode);
if (MEM_P (src))
{
- src = rs6000_address_for_fpconvert (src);
+ src = rs6000_force_indexed_or_indirect_mem (src);
emit_insn (gen_lfiwax (tmp, src));
}
else
@@ -5252,7 +5252,7 @@
""
[(pc)]
{
- operands[1] = rs6000_address_for_fpconvert (operands[1]);
+ operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]);
if (GET_CODE (operands[2]) == SCRATCH)
operands[2] = gen_reg_rtx (DImode);
if (TARGET_P8_VECTOR)
@@ -5300,7 +5300,7 @@
tmp = gen_reg_rtx (DImode);
if (MEM_P (src))
{
- src = rs6000_address_for_fpconvert (src);
+ src = rs6000_force_indexed_or_indirect_mem (src);
emit_insn (gen_lfiwzx (tmp, src));
}
else
@@ -5327,7 +5327,7 @@
""
[(pc)]
{
- operands[1] = rs6000_address_for_fpconvert (operands[1]);
+ operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]);
if (GET_CODE (operands[2]) == SCRATCH)
operands[2] = gen_reg_rtx (DImode);
if (TARGET_P8_VECTOR)
@@ -5513,7 +5513,7 @@
"TARGET_P9_VECTOR && TARGET_DIRECT_MOVE && TARGET_POWERPC64"
{
if (MEM_P (operands[1]))
- operands[1] = rs6000_address_for_fpconvert (operands[1]);
+ operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]);
})
(define_insn_and_split "*float<QHI:mode><FP_ISA3:mode>2_internal"
@@ -5565,7 +5565,7 @@
"TARGET_P9_VECTOR && TARGET_DIRECT_MOVE && TARGET_POWERPC64"
{
if (MEM_P (operands[1]))
- operands[1] = rs6000_address_for_fpconvert (operands[1]);
+ operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]);
})
(define_insn_and_split "*floatuns<QHI:mode><FP_ISA3:mode>2_internal"
@@ -5646,7 +5646,7 @@
emit_insn (gen_fctiwz_<mode> (tmp, src));
if (MEM_P (dest))
{
- dest = rs6000_address_for_fpconvert (dest);
+ dest = rs6000_force_indexed_or_indirect_mem (dest);
emit_insn (gen_stfiwx (dest, tmp));
DONE;
}
@@ -5793,7 +5793,7 @@
emit_insn (gen_fctiwuz_<mode> (tmp, src));
if (MEM_P (dest))
{
- dest = rs6000_address_for_fpconvert (dest);
+ dest = rs6000_force_indexed_or_indirect_mem (dest);
emit_insn (gen_stfiwx (dest, tmp));
DONE;
}
@@ -14387,7 +14387,7 @@
operands[2] = gen_reg_rtx (DImode);
if (MEM_P (operands[1]))
- operands[1] = rs6000_address_for_fpconvert (operands[1]);
+ operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]);
})
(define_insn_and_split "float<QHI:mode><IEEE128:mode>2"
@@ -14453,7 +14453,7 @@
operands[2] = gen_reg_rtx (DImode);
if (MEM_P (operands[1]))
- operands[1] = rs6000_address_for_fpconvert (operands[1]);
+ operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]);
})
(define_insn_and_split "floatuns<QHI:mode><IEEE128:mode>2"
Index: gcc/config/rs6000/vsx.md
===================================================================
--- gcc/config/rs6000/vsx.md (revision 265637)
+++ gcc/config/rs6000/vsx.md (working copy)
@@ -3624,7 +3624,7 @@
if (MEM_P (operands[0]))
{
if (can_create_pseudo_p ())
- dest = rs6000_address_for_fpconvert (dest);
+ dest = rs6000_force_indexed_or_indirect_mem (dest);
if (TARGET_P8_VECTOR)
emit_move_insn (dest, gen_rtx_REG (SImode, REGNO (vec_tmp)));
@@ -4088,7 +4088,7 @@
{
rtx op1 = operands[1];
if (MEM_P (op1))
- operands[1] = rs6000_address_for_fpconvert (op1);
+ operands[1] = rs6000_force_indexed_or_indirect_mem (op1);
else if (!REG_P (op1))
op1 = force_reg (<VSX_D:VS_scalar>mode, op1);
})
--
Aaron Sawdey, Ph.D. acsaw...@linux.vnet.ibm.com
050-2/C113 (507) 253-7520 home: 507/263-0782
IBM Linux Technology Center - PPC Toolchain
